mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 19:09:43 +09:00
7a8e9bed17
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
222 lines
6.3 KiB
C
222 lines
6.3 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <malloc.h>
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#include <asm/ptrace.h>
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#include <asm/realmode.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#undef PCI_BIOS_DEBUG
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#undef VGA_BIOS_DEBUG
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#ifdef VGA_BIOS_DEBUG
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#define PRINTF(fmt,args...) printf (fmt ,##args)
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#else
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#define PRINTF(fmt,args...)
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#endif
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#ifdef CONFIG_PCI
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#ifdef PCI_BIOS_DEBUG
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#define RELOC_16(seg, off) *(u32*)(seg << 4 | (u32)&off)
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extern u32 num_pci_bios_present;
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extern u32 num_pci_bios_find_device;
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extern u32 num_pci_bios_find_class;
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extern u32 num_pci_bios_generate_special_cycle;
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extern u32 num_pci_bios_read_cfg_byte;
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extern u32 num_pci_bios_read_cfg_word;
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extern u32 num_pci_bios_read_cfg_dword;
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extern u32 num_pci_bios_write_cfg_byte;
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extern u32 num_pci_bios_write_cfg_word;
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extern u32 num_pci_bios_write_cfg_dword;
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extern u32 num_pci_bios_get_irq_routing;
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extern u32 num_pci_bios_set_irq;
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extern u32 num_pci_bios_unknown_function;
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void print_bios_bios_stat(void)
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{
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printf("16 bit functions:\n");
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printf("pci_bios_present: %d\n", RELOC_16(0xf000, num_pci_bios_present));
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printf("pci_bios_find_device: %d\n", RELOC_16(0xf000, num_pci_bios_find_device));
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printf("pci_bios_find_class: %d\n", RELOC_16(0xf000, num_pci_bios_find_class));
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printf("pci_bios_generate_special_cycle: %d\n", RELOC_16(0xf000, num_pci_bios_generate_special_cycle));
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printf("pci_bios_read_cfg_byte: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_byte));
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printf("pci_bios_read_cfg_word: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_word));
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printf("pci_bios_read_cfg_dword: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_dword));
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printf("pci_bios_write_cfg_byte: %d\n", RELOC_16(0xf000, num_pci_bios_write_cfg_byte));
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printf("pci_bios_write_cfg_word: %d\n", RELOC_16(0xf000, num_pci_bios_write_cfg_word));
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printf("pci_bios_write_cfg_dword: %d\n", RELOC_16(0xf000, num_pci_bios_write_cfg_dword));
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printf("pci_bios_get_irq_routing: %d\n", RELOC_16(0xf000, num_pci_bios_get_irq_routing));
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printf("pci_bios_set_irq: %d\n", RELOC_16(0xf000, num_pci_bios_set_irq));
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printf("pci_bios_unknown_function: %d\n", RELOC_16(0xf000, num_pci_bios_unknown_function));
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}
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#endif
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#define PCI_CLASS_VIDEO 3
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#define PCI_CLASS_VIDEO_STD 0
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#define PCI_CLASS_VIDEO_PROG_IF_VGA 0
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static u32 probe_pci_video(void)
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{
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pci_dev_t devbusfn;
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if ((devbusfn = pci_find_class(PCI_CLASS_VIDEO,
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PCI_CLASS_VIDEO_STD,
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PCI_CLASS_VIDEO_PROG_IF_VGA, 0)) != -1) {
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u32 old;
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u32 addr;
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/* PCI video device detected */
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printf("Found PCI VGA device at %02x.%02x.%x\n",
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PCI_BUS(devbusfn), PCI_DEV(devbusfn), PCI_FUNC(devbusfn));
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/* Enable I/O decoding as well, PCI viudeo boards
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* support I/O accesses, but they provide no
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* bar register for this since the ports are fixed.
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*/
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pci_write_config_word(devbusfn, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO | PCI_COMMAND_MASTER);
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/* Test the ROM decoder, do the device support a rom? */
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pci_read_config_dword(devbusfn, PCI_ROM_ADDRESS, &old);
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pci_write_config_dword(devbusfn, PCI_ROM_ADDRESS, PCI_ROM_ADDRESS_MASK);
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pci_read_config_dword(devbusfn, PCI_ROM_ADDRESS, &addr);
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pci_write_config_dword(devbusfn, PCI_ROM_ADDRESS, old);
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if (!addr) {
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printf("PCI VGA have no ROM?\n");
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return 0;
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}
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/* device have a rom */
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if (pci_shadow_rom(devbusfn, (void*)0xc0000)) {
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printf("Shadowing of PCI VGA BIOS failed\n");
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return 0;
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}
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/* Now enable lagacy VGA port access */
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if (pci_enable_legacy_video_ports(pci_bus_to_hose(PCI_BUS(devbusfn)))) {
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printf("PCI VGA enable failed\n");
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return 0;
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}
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/* return the pci device info, that we'll need later */
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return PCI_BUS(devbusfn) << 8 |
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PCI_DEV(devbusfn) << 3 | (PCI_FUNC(devbusfn)&7);
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}
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return 0;
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}
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#endif
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static int probe_isa_video(void)
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{
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u32 ptr;
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char *buf;
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if (0 == (ptr = isa_map_rom(0xc0000, 0x8000))) {
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return -1;
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}
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if (NULL == (buf=malloc(0x8000))) {
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isa_unmap_rom(ptr);
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return -1;
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}
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if (readw(ptr) != 0xaa55) {
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free(buf);
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isa_unmap_rom(ptr);
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return -1;
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}
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/* shadow the rom */
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memcpy(buf, (void*)ptr, 0x8000);
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isa_unmap_rom(ptr);
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memcpy((void*)0xc0000, buf, 0x8000);
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free(buf);
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return 0;
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}
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int video_bios_init(void)
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{
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struct pt_regs regs;
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/* clear the video bios area in case we warmbooted */
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memset((void*)0xc0000, 0, 0x8000);
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memset(®s, 0, sizeof(struct pt_regs));
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if (probe_isa_video()) {
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/* No ISA board found, try the PCI bus */
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regs.eax = probe_pci_video();
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}
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/* Did we succeed in mapping any video bios */
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if (readw(0xc0000) == 0xaa55) {
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int size;
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int i;
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u8 sum;
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PRINTF("Found video bios signature\n");
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size = 512*readb(0xc0002);
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PRINTF("size %d\n", size);
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sum=0;
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for (i=0;i<size;i++) {
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sum += readb(0xc0000 + i);
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}
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PRINTF("Checksum is %sOK\n",sum?"NOT ":"");
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if (sum) {
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return 1;
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}
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/* some video bioses (ATI Mach64) seem to think that
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* the original int 10 handler is always at
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* 0xf000:0xf065 , place an iret instruction there
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*/
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writeb(0xcf, 0xff065);
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regs.esp = 0x8000;
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regs.xss = 0x2000;
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enter_realmode(0xc000, 3, ®s, ®s);
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PRINTF("INT 0x10 vector after: %04x:%04x\n",
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readw(0x42), readw(0x40));
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PRINTF("BIOS returned %scarry\n", regs.eflags & 1?"":"NOT ");
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#ifdef PCI_BIOS_DEBUG
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print_bios_bios_stat();
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#endif
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return (regs.eflags & 1);
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}
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return 1;
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}
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