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![Rasmus Villemoes](/assets/img/avatar_default.png)
Somewhere between v2020.04 and v2020.07 the mpc8xxx_spi driver broke,
I'm guessing due to this hunk
@@ -559,6 +560,8 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)
if (ret)
return ret;
+ /* combine the requested flags (for IN/OUT) and the descriptor flags */
+ flags |= desc->flags;
ret = _dm_gpio_set_dir_flags(desc, flags);
from commit 695e5fd546
("gpio: update dir_flags management"). But
the blame is mostly on the driver itself which seems rather confused:
The chip select gpios are requested with GPIOD_ACTIVE_LOW, but then in
each activate/deactivate, dm_gpio_set_dir_flags() is called with
merely GPIOD_IS_OUT, and then the driver call set_value(0) for
activate.
That used to work, but with the above hunk, the ACTIVE_LOW setting
from the request becomes persistent, so the gpio driver ends up being
asked to set the value to 1 in mpc8xxx_spi_cs_activate().
So drop the dm_gpio_set_dir_flags() calls in the activate/deactivate
functions, and use a value of 1 to mean "logically enabled".
Ideally, I think we should also drop the GPIOD_ACTIVE_LOW from the
request and make it up to the list of gpio cs in DT to indicate
whether that CS is enabled when driven low (as is of course usually
the case), but that requires changing
arch/powerpc/dts/gdsys/gazerbeam-base.dtsi among others, and I don't
have that hardware to test on. I have, however, tested our
own (mpc8309-based) hardware with this change, and I have also tested
that removing the GPIOD_ACTIVE_LOW from the request and updating our
DT as
- gpios = <&spisel 0 0>;
+ gpios = <&spisel 0 GPIO_ACTIVE_LOW>;
still works.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
286 lines
6.8 KiB
C
286 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
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* With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/mpc8xxx_spi.h>
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#include <asm-generic/gpio.h>
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#include <dm/device_compat.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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enum {
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SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */
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SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */
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};
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enum {
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SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */
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SPI_MODE_CI = BIT(31 - 2), /* Clock invert */
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SPI_MODE_CP = BIT(31 - 3), /* Clock phase */
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SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */
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SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */
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SPI_MODE_MS = BIT(31 - 6), /* Always master */
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SPI_MODE_EN = BIT(31 - 7), /* Enable interface */
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SPI_MODE_LEN_MASK = 0xf00000,
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SPI_MODE_LEN_SHIFT = 20,
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SPI_MODE_PM_SHIFT = 16,
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SPI_MODE_PM_MASK = 0xf0000,
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SPI_COM_LST = BIT(31 - 9),
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};
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struct mpc8xxx_priv {
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spi8xxx_t *spi;
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struct gpio_desc gpios[16];
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int cs_count;
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ulong clk_rate;
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};
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#define SPI_TIMEOUT 1000
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static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev)
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{
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struct mpc8xxx_priv *priv = dev_get_priv(dev);
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struct clk clk;
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int ret;
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priv->spi = (spi8xxx_t *)dev_read_addr(dev);
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ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
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ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW);
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if (ret < 0)
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return -EINVAL;
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priv->cs_count = ret;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret) {
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dev_err(dev, "%s: clock not defined\n", __func__);
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return ret;
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}
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priv->clk_rate = clk_get_rate(&clk);
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if (!priv->clk_rate) {
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dev_err(dev, "%s: failed to get clock rate\n", __func__);
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return -EINVAL;
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}
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return 0;
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}
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static int mpc8xxx_spi_probe(struct udevice *dev)
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{
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struct mpc8xxx_priv *priv = dev_get_priv(dev);
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spi8xxx_t *spi = priv->spi;
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/*
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* SPI pins on the MPC83xx are not muxed, so all we do is initialize
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* some registers
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*/
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out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS);
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/* set len to 8 bits */
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setbits_be32(&spi->mode, (8 - 1) << SPI_MODE_LEN_SHIFT);
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setbits_be32(&spi->mode, SPI_MODE_EN);
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/* Clear all SPI events */
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setbits_be32(&priv->spi->event, 0xffffffff);
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/* Mask all SPI interrupts */
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clrbits_be32(&priv->spi->mask, 0xffffffff);
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/* LST bit doesn't do anything, so disregard */
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out_be32(&priv->spi->com, 0);
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return 0;
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}
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static void mpc8xxx_spi_cs_activate(struct udevice *dev)
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{
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struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
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struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
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}
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static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
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{
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struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
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struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
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}
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static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
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const void *dout, void *din, ulong flags)
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{
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struct udevice *bus = dev->parent;
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struct mpc8xxx_priv *priv = dev_get_priv(bus);
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spi8xxx_t *spi = priv->spi;
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struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
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u32 tmpdin = 0, tmpdout = 0, n;
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const u8 *cout = dout;
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u8 *cin = din;
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debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
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bus->name, platdata->cs, (uint)dout, (uint)din, bitlen);
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if (platdata->cs >= priv->cs_count) {
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dev_err(dev, "chip select index %d too large (cs_count=%d)\n",
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platdata->cs, priv->cs_count);
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return -EINVAL;
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}
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if (bitlen % 8) {
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printf("*** spi_xfer: bitlen must be multiple of 8\n");
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return -ENOTSUPP;
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}
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if (flags & SPI_XFER_BEGIN)
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mpc8xxx_spi_cs_activate(dev);
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/* Clear all SPI events */
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setbits_be32(&spi->event, 0xffffffff);
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n = bitlen / 8;
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/* Handle data in 8-bit chunks */
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while (n--) {
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ulong start;
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if (cout)
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tmpdout = *cout++;
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/* Write the data out */
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out_be32(&spi->tx, tmpdout);
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debug("*** %s: ... %08x written\n", __func__, tmpdout);
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/*
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* Wait for SPI transmit to get out
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* or time out (1 second = 1000 ms)
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* The NE event must be read and cleared first
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*/
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start = get_timer(0);
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do {
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u32 event = in_be32(&spi->event);
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bool have_ne = event & SPI_EV_NE;
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bool have_nf = event & SPI_EV_NF;
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if (!have_ne)
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continue;
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tmpdin = in_be32(&spi->rx);
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setbits_be32(&spi->event, SPI_EV_NE);
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if (cin)
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*cin++ = tmpdin;
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/*
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* Only bail when we've had both NE and NF events.
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* This will cause timeouts on RO devices, so maybe
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* in the future put an arbitrary delay after writing
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* the device. Arbitrary delays suck, though...
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*/
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if (have_nf)
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break;
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mdelay(1);
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} while (get_timer(start) < SPI_TIMEOUT);
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if (get_timer(start) >= SPI_TIMEOUT) {
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debug("*** %s: Time out during SPI transfer\n",
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__func__);
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return -ETIMEDOUT;
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}
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debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
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}
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if (flags & SPI_XFER_END)
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mpc8xxx_spi_cs_deactivate(dev);
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return 0;
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}
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static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed)
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{
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struct mpc8xxx_priv *priv = dev_get_priv(dev);
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spi8xxx_t *spi = priv->spi;
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u32 bits, mask, div16, pm;
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u32 mode;
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ulong clk;
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clk = priv->clk_rate;
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if (clk / 64 > speed) {
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div16 = SPI_MODE_DIV16;
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clk /= 16;
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} else {
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div16 = 0;
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}
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pm = (clk - 1)/(4*speed) + 1;
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if (pm > 16) {
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dev_err(dev, "requested speed %u too small\n", speed);
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return -EINVAL;
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}
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pm--;
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bits = div16 | (pm << SPI_MODE_PM_SHIFT);
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mask = SPI_MODE_DIV16 | SPI_MODE_PM_MASK;
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mode = in_be32(&spi->mode);
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if ((mode & mask) != bits) {
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/* Must clear mode[EN] while changing speed. */
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mode &= ~(mask | SPI_MODE_EN);
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out_be32(&spi->mode, mode);
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mode |= bits;
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out_be32(&spi->mode, mode);
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mode |= SPI_MODE_EN;
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out_be32(&spi->mode, mode);
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}
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debug("requested speed %u, set speed to %lu/(%s4*%u) == %lu\n",
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speed, priv->clk_rate, div16 ? "16*" : "", pm + 1,
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clk/(4*(pm + 1)));
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return 0;
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}
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static int mpc8xxx_spi_set_mode(struct udevice *dev, uint mode)
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{
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/* TODO(mario.six@gdsys.cc): Using SPI_CPHA (for clock phase) and
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* SPI_CPOL (for clock polarity) should work
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*/
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return 0;
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}
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static const struct dm_spi_ops mpc8xxx_spi_ops = {
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.xfer = mpc8xxx_spi_xfer,
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.set_speed = mpc8xxx_spi_set_speed,
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.set_mode = mpc8xxx_spi_set_mode,
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/*
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* cs_info is not needed, since we require all chip selects to be
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* in the device tree explicitly
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*/
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};
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static const struct udevice_id mpc8xxx_spi_ids[] = {
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{ .compatible = "fsl,spi" },
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{ }
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};
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U_BOOT_DRIVER(mpc8xxx_spi) = {
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.name = "mpc8xxx_spi",
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.id = UCLASS_SPI,
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.of_match = mpc8xxx_spi_ids,
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.ops = &mpc8xxx_spi_ops,
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.ofdata_to_platdata = mpc8xxx_spi_ofdata_to_platdata,
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.probe = mpc8xxx_spi_probe,
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.priv_auto_alloc_size = sizeof(struct mpc8xxx_priv),
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};
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