u-boot-brain/arch/powerpc/cpu/mpc85xx
York Sun f31cfd1925 powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT
When ECC is enabled, DDR controller needs to initialize the data and ecc.
The wait time can be calcuated with total memory size, bus width, bus speed
and interleaving mode. If it went wrong, it is bettert to timeout than
waiting for D_INIT to clear, where it probably hangs.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:27 -05:00
..
b4860_ids.c powerpc/mpc85xx: Add B4860 and variant SoCs 2012-10-22 14:31:24 -05:00
b4860_serdes.c powerpc/mpc85xx: Add B4860 and variant SoCs 2012-10-22 14:31:24 -05:00
cache.c MPC8xxx: Define cache ops for USB 2012-06-07 23:29:19 +02:00
cmd_errata.c powerpc/srio: Workaround for srio erratrm a004034 2012-10-22 14:31:12 -05:00
commproc.c POST cleanup. 2010-09-21 21:39:31 +02:00
config.mk Reduce build times 2011-11-03 20:44:58 +01:00
cpu_init_early.c powerpc/85xx:Make debug exception vector accessible 2012-07-06 17:30:30 -05:00
cpu_init_nand.c powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting 2012-07-06 17:30:31 -05:00
cpu_init.c powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
cpu.c powerpc/corenet2: fix mismatch DDR sync bit from RCW 2012-10-22 14:31:20 -05:00
ddr-gen1.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
ddr-gen2.c powerpc/mpc8548: Add workaround for erratum NMG_DDR120 2011-10-03 08:52:14 -05:00
ddr-gen3.c powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT 2012-10-22 14:31:27 -05:00
ether_fcc.c arch/powerpc/cpu/mpc85xx/ether_fcc.c: Fix compile warning 2012-05-22 13:41:46 -05:00
fdt.c powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
fixed_ivor.S Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
fsl_corenet_serdes.c powerpc/85xx: Add P5040 processor support 2012-10-22 14:31:13 -05:00
fsl_corenet_serdes.h powerpc/corenet2: Add SerDes for corenet2 2012-10-22 14:31:19 -05:00
fsl_corenet2_serdes.c powerpc/corenet2: Add SerDes for corenet2 2012-10-22 14:31:19 -05:00
fsl_corenet2_serdes.h powerpc/corenet2: Add SerDes for corenet2 2012-10-22 14:31:19 -05:00
interrupts.c mpc8[5/6]xx: Ensure POST word does not get reset 2011-03-13 11:24:44 -05:00
liodn.c powerpc/p5040ds: add per pci endpoint liodn offset list 2012-10-22 14:31:13 -05:00
Makefile powerpc/mpc85xx: Add B4860 and variant SoCs 2012-10-22 14:31:24 -05:00
mp.c powerpc/mp: add support for discontiguous cores 2011-09-29 19:01:05 -05:00
mp.h 85xx: Add support for not releasing secondary cores via 'mp_holdoff' 2010-10-20 02:38:40 -05:00
mpc8536_serdes.c powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support 2010-07-21 00:40:16 -05:00
mpc8544_serdes.c powerpc/85xx: Add is_serdes_configured() support for MPC8544 SERDES 2011-01-14 01:32:18 -06:00
mpc8548_serdes.c powerpc/85xx: Add is_serdes_configured() support for MPC8548 SERDES 2011-01-14 01:32:18 -06:00
mpc8568_serdes.c powerpc/85xx: Add is_serdes_configured() support for MPC8568 SERDES 2011-01-14 01:32:18 -06:00
mpc8569_serdes.c powerpc/85xx: Add is_serdes_configured() support for MPC8569 SERDES 2011-01-14 01:32:18 -06:00
mpc8572_serdes.c powerpc/85xx: Add is_serdes_configured() support for MPC8572 SERDES 2011-01-14 01:32:18 -06:00
p1010_serdes.c powerpc/85xx: Add SERDES support for P1010/P1014 2011-04-04 09:24:40 -05:00
p1021_serdes.c powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs 2011-03-29 07:41:37 -05:00
p1022_serdes.c powerpc/85xx: Rework P1022 SERDES is_serdes_configured support 2010-07-21 00:40:20 -05:00
p1023_serdes.c powerpc/85xx: Add support for Freescale P1023/P1017 Processors 2011-04-04 09:24:41 -05:00
p2020_serdes.c powerpc/85xx: Add is_serdes_configured() support for P2020 SERDES 2011-01-14 01:32:18 -06:00
p2041_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p2041_serdes.c powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() 2012-07-06 17:30:33 -05:00
p3041_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p3041_serdes.c powerpc/p3041: Add various p3041 specific information 2011-01-19 22:58:23 -06:00
p4080_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p4080_serdes.c powerpc/p4080: Add workaround for errata SERDES8 2010-07-26 13:07:57 -05:00
p5020_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p5020_serdes.c powerpc/p5020: Add various p5020 specific information 2011-01-19 22:58:23 -06:00
p5040_ids.c powerpc/85xx: Add P5040 processor support 2012-10-22 14:31:13 -05:00
p5040_serdes.c powerpc/85xx: Add P5040 processor support 2012-10-22 14:31:13 -05:00
pci.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
portals.c powerpc/85xx: Add support for RMan LIODN initialization 2011-10-18 00:36:48 -05:00
qe_io.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
release.S powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
resetvec.S Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
serial_scc.c serial: Use default_serial_puts() in drivers 2012-10-17 07:55:50 -07:00
speed.c powerpc/mpc85xx: Fix core cluster PLL calculation for Chassis generation 2 2012-10-22 14:31:16 -05:00
start.S powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
t4240_ids.c powerpc/mpc85xx: Add T4240 SoC 2012-10-22 14:31:23 -05:00
t4240_serdes.c powerpc/mpc85xx: Add T4240 SoC 2012-10-22 14:31:23 -05:00
tlb.c arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning 2011-11-11 07:48:59 -06:00
traps.c powerpc/8xxx: share PIC defines among 85xx and 86xx 2010-08-19 02:06:13 -05:00
u-boot-nand_spl.lds powerpc/85xx: fix NAND boot linker scripts for -fpic 2012-05-18 17:34:39 -05:00
u-boot-nand.lds powerpc/85xx: fix NAND boot linker scripts for -fpic 2012-05-18 17:34:39 -05:00
u-boot.lds rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00