Simon Glass f31b02c84e x86: Sort the MTRR table ... At present the MTRR registers are programmed with the list the U-Boot builds up in the same order. In some cases this list may be out of order. It looks better in Linux to have the registers in order, so sort them, Signed-off-by: Simon Glass <sjg@chromium.org>		2020-09-25 11:27:22 +08:00
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cpu	x86: Sort the MTRR table	2020-09-25 11:27:22 +08:00
dts	x86: chromebook_panther: Correct the image layout	2020-07-28 19:30:39 -06:00
include/asm	x86: cpu: Report address width from cpu_get_info()	2020-09-25 11:27:21 +08:00
lib	x86: apl: Generate CPU tables	2020-09-25 11:27:20 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	x86: Support Atom SoCs using SWSMISCI rather than the SWSCI	2020-09-25 11:27:18 +08:00
Makefile	x86: Allow 16-bit init to be in TPL	2019-05-08 13:02:13 +08:00