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https://github.com/brain-hackers/u-boot-brain
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f311838ded
The T4 has added devices to previous corenet implementations: * SEC has 3 more DECO units * New PMAN device * New DCE device This doesn't add full support for the new devices. Just some preliminary support. Move PMAN LIODN to upper half of register Despite having only one LIODN, the PMAN LIODN is stored in the upper half of the register. Re-use the 2-LIODN code and just set the LIODN as if the second one is 0. This results in the actual LIODN being written to the upper half of the register. Signed-off-by: Andy Fleming <afleming@freescale.com> |
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| blackfin | ||
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| nds32 | ||
| nios2 | ||
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| sh | ||
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| .gitignore | ||