mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
e7de18afe8
i.MX31 powers on with most clocks running, so, after a power on this explicit clock start up is not required. However, as Linux boots it disables most clocks to save power. This includes the I2C clock. If we then soft reboot from Linux the I2C clock stays off. This breaks the phycore, which has its environment in I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver initialisation routine. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
209 lines
4.7 KiB
C
209 lines
4.7 KiB
C
/*
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* i2c driver for Freescale mx31
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*
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* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if defined(CONFIG_HARD_I2C)
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#include <asm/arch/mx31.h>
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#include <asm/arch/mx31-regs.h>
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#define IADR 0x00
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#define IFDR 0x04
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#define I2CR 0x08
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#define I2SR 0x0c
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#define I2DR 0x10
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#define I2CR_IEN (1 << 7)
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#define I2CR_IIEN (1 << 6)
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#define I2CR_MSTA (1 << 5)
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#define I2CR_MTX (1 << 4)
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#define I2CR_TX_NO_AK (1 << 3)
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#define I2CR_RSTA (1 << 2)
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#define I2SR_ICF (1 << 7)
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#define I2SR_IBB (1 << 5)
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#define I2SR_IIF (1 << 1)
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#define I2SR_RX_NO_AK (1 << 0)
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#ifdef CONFIG_SYS_I2C_MX31_PORT1
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#define I2C_BASE 0x43f80000
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#define I2C_CLK_OFFSET 26
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#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
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#define I2C_BASE 0x43f98000
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#define I2C_CLK_OFFSET 28
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#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
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#define I2C_BASE 0x43f84000
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#define I2C_CLK_OFFSET 30
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#else
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#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver"
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#endif
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#ifdef DEBUG
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#define DPRINTF(args...) printf(args)
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#else
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#define DPRINTF(args...)
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#endif
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static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
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160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
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1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
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void i2c_init(int speed, int unused)
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{
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int freq = mx31_get_ipg_clk();
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int i;
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/* start the required I2C clock */
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__REG(CCM_CGR0) = __REG(CCM_CGR0) | (3 << I2C_CLK_OFFSET);
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for (i = 0; i < 0x1f; i++)
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if (freq / div[i] <= speed)
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break;
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DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
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__REG16(I2C_BASE + I2CR) = 0; /* Reset module */
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__REG16(I2C_BASE + IFDR) = i;
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__REG16(I2C_BASE + I2CR) = I2CR_IEN;
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__REG16(I2C_BASE + I2SR) = 0;
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}
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static int wait_busy(void)
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{
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int timeout = 10000;
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while (!(__REG16(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
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udelay(1);
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__REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
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return timeout;
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}
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static int tx_byte(u8 byte)
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{
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__REG16(I2C_BASE + I2DR) = byte;
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if (!wait_busy() || __REG16(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
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return -1;
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return 0;
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}
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static int rx_byte(void)
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{
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if (!wait_busy())
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return -1;
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return __REG16(I2C_BASE + I2DR);
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}
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int i2c_probe(uchar chip)
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{
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int ret;
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__REG16(I2C_BASE + I2CR) = 0; /* Reset module */
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__REG16(I2C_BASE + I2CR) = I2CR_IEN;
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
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ret = tx_byte(chip << 1);
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MTX;
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return ret;
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}
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static int i2c_addr(uchar chip, uint addr, int alen)
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{
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__REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
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if (tx_byte(chip << 1))
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return -1;
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while (alen--)
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if (tx_byte((addr >> (alen * 8)) & 0xff))
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return -1;
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return 0;
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}
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int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int timeout = 10000;
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int ret;
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DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
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if (i2c_addr(chip, addr, alen)) {
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printf("i2c_addr failed\n");
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return -1;
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}
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
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if (tx_byte(chip << 1 | 1))
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return -1;
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ? I2CR_TX_NO_AK : 0);
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ret = __REG16(I2C_BASE + I2DR);
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while (len--) {
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if ((ret = rx_byte()) < 0)
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return -1;
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*buf++ = ret;
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if (len <= 1)
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__REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_TX_NO_AK;
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}
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wait_busy();
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__REG16(I2C_BASE + I2CR) = I2CR_IEN;
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while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
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udelay(1);
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return 0;
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}
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int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int timeout = 10000;
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DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
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if (i2c_addr(chip, addr, alen))
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return -1;
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while (len--)
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if (tx_byte(*buf++))
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return -1;
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__REG16(I2C_BASE + I2CR) = I2CR_IEN;
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while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
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udelay(1);
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return 0;
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}
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#endif /* CONFIG_HARD_I2C */
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