mirror of
https://github.com/brain-hackers/u-boot-brain
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85b8c5c4bf
Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
389 lines
12 KiB
C
389 lines
12 KiB
C
/*
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* (C) Copyright 2006-2008
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* Texas Instruments.
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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*
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* (C) Copyright 2012
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* Corscience GmbH & Co. KG
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* Thomas Weber <weber@corscience.de>
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*
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* Configuration settings for the Tricorder board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_OMAP /* in a TI OMAP core */
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#define CONFIG_OMAP34XX /* which is a 34XX */
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#define CONFIG_OMAP_COMMON
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#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SDRC /* The chip has SDRC controller */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap3.h>
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/* Display CPU and Board information */
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_OF_LIBFDT
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (1024*1024)
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/* Hardware drivers */
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/* GPIO support */
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#define CONFIG_OMAP_GPIO
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/* LED support */
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#define CONFIG_STATUS_LED
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#define CONFIG_BOARD_SPECIFIC_LED
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#define CONFIG_CMD_LED /* LED command */
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#define STATUS_LED_BIT (1 << 0)
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BIT1 (1 << 1)
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#define STATUS_LED_STATE1 STATUS_LED_ON
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#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BIT2 (1 << 2)
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#define STATUS_LED_STATE2 STATUS_LED_ON
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#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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/* select serial console configuration */
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#define CONFIG_CONS_INDEX 3
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SERIAL3 3
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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/* MMC */
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_DOS_PARTITION
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/* I2C */
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_DRIVER_OMAP34XX_I2C 1
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#define CONFIG_I2C_MULTI_BUS
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/* EEPROM */
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_CMD_EEPROM
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_EEPROM_BUS_NUM 1
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/* TWL4030 */
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#define CONFIG_TWL4030_POWER
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#define CONFIG_TWL4030_LED
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/* Board NAND Info */
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#define CONFIG_SYS_NO_FLASH /* no NOR flash */
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
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"128k(SPL)," \
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"1m(u-boot)," \
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"384k(u-boot-env1)," \
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"1152k(mtdoops)," \
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"384k(u-boot-env2)," \
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"5m(kernel)," \
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"2m(fdt)," \
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"-(ubi)"
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
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/* to access nand at */
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/* CS0 */
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
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/* devices */
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#define CONFIG_NAND_OMAP_BCH8
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#define CONFIG_BCH
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_EXT2 /* EXT2 Support */
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
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#define CONFIG_CMD_UBI /* UBI commands */
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#define CONFIG_CMD_UBIFS /* UBIFS commands */
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#define CONFIG_LZO /* LZO is needed for UBIFS */
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
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#undef CONFIG_CMD_IMI /* iminfo */
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#undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
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/* needed for ubi */
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#define CONFIG_RBTREE
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_MTD_PARTITIONS
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/* Environment information (this is the common part) */
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#define CONFIG_BOOTDELAY 0
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/* hang() the board on panic() */
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#define CONFIG_PANIC_HANG
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/* environment placement (for NAND), is different for FLASHCARD but does not
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* harm there */
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#define CONFIG_ENV_OFFSET 0x120000 /* env start */
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#define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
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#define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
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#define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
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/* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
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* value can not be used here! */
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#define CONFIG_LOADADDR 0x82000000
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#define CONFIG_COMMON_ENV_SETTINGS \
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"console=ttyO2,115200n8\0" \
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"mmcdev=0\0" \
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"vram=3M\0" \
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"defaultdisplay=lcd\0" \
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"kernelopts=mtdoops.mtddev=3\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"commonargs=" \
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"setenv bootargs console=${console} " \
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"${mtdparts} " \
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"${kernelopts} " \
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"vt.global_cursor_default=0 " \
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"vram=${vram} " \
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"omapdss.def_disp=${defaultdisplay}\0"
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#define CONFIG_BOOTCOMMAND "run autoboot"
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/* specific environment settings for different use cases
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* FLASHCARD: used to run a rdimage from sdcard to program the device
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* 'NORMAL': used to boot kernel from sdcard, nand, ...
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*
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* The main aim for the FLASHCARD skin is to have an embedded environment
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* which will not be influenced by any data already on the device.
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*/
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#ifdef CONFIG_FLASHCARD
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#define CONFIG_ENV_IS_NOWHERE
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/* the rdaddr is 16 MiB before the loadaddr */
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#define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_COMMON_ENV_SETTINGS \
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CONFIG_ENV_RDADDR \
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"autoboot=" \
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"run commonargs; " \
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"setenv bootargs ${bootargs} " \
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"flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
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"rdinit=/sbin/init; " \
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"mmc dev ${mmcdev}; mmc rescan; " \
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"fatload mmc ${mmcdev} ${loadaddr} uImage; " \
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"fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
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"bootm ${loadaddr} ${rdaddr}\0"
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#else /* CONFIG_FLASHCARD */
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#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_COMMON_ENV_SETTINGS \
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"mmcargs=" \
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"run commonargs; " \
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"setenv bootargs ${bootargs} " \
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"root=/dev/mmcblk0p2 " \
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"rootwait " \
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"rw\0" \
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"nandargs=" \
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"run commonargs; " \
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"setenv bootargs ${bootargs} " \
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"root=ubi0:root " \
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"ubi.mtd=7 " \
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"rootfstype=ubifs " \
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"ro\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source ${loadaddr}\0" \
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"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"loaduimage_ubi=ubi part ubi; " \
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"ubifsmount ubi:root; " \
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"ubifsload ${loadaddr} /boot/uImage\0" \
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"loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"run loaduimage_nand; " \
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"bootm ${loadaddr}\0" \
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"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loaduimage; then " \
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"run mmcboot; " \
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"else run nandboot; " \
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"fi; " \
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"fi; " \
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"else run nandboot; fi\0"
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#endif /* CONFIG_FLASHCARD */
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_CMDLINE_EDITING /* enable cmdline history */
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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0x07000000) /* 112 MB */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/* NAND and environment organization */
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/* SRAM config */
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#define CONFIG_SYS_SRAM_START 0x40200000
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#define CONFIG_SYS_SRAM_SIZE 0x10000
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
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#define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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/* NAND boot config */
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\
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21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
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34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
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47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
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60, 61, 62, 63}
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 13
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
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#endif /* __CONFIG_H */
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