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https://github.com/brain-hackers/u-boot-brain
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a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
42 lines
1.0 KiB
C
42 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (c) Copyright 2016, Data61
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* Commonwealth Scientific and Industrial Research Organisation (CSIRO)
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*
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* Based on jetson-tk1.h which is:
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* (C) Copyright 2013-2014
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* NVIDIA Corporation <www.nvidia.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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#include "tegra124-common.h"
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/* High-level configuration options */
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#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som"
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/* Board-specific serial config */
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#define CONFIG_TEGRA_ENABLE_UARTD
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 2
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/* SPI */
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#define CONFIG_SPI_FLASH_SIZE (4 << 20)
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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#define CONFIG_ARMV7_PSCI 1
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#define CONFIG_ARMV7_PSCI_NR_CPUS 4
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/* Reserve top 1M for secure RAM */
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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#endif /* __CONFIG_H */
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