mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-31 22:39:08 +09:00
![Sumit Garg](/assets/img/avatar_default.png)
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
442 lines
11 KiB
C
442 lines
11 KiB
C
/*
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* FSL PAMU driver
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*
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* Copyright 2012-2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/log2.h>
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#include <malloc.h>
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#include <asm/fsl_pamu.h>
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struct paace *ppaact;
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struct paace *sec;
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unsigned long fspi;
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static inline int __ilog2_roundup_64(uint64_t val)
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{
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if ((val & (val - 1)) == 0)
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return __ilog2_u64(val);
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else
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return __ilog2_u64(val) + 1;
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}
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static inline int count_lsb_zeroes(unsigned long val)
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{
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return ffs(val) - 1;
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}
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static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
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{
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/* window size is 2^(WSE+1) bytes */
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return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
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PAMU_PAGE_SHIFT - 1;
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}
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static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
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{
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/* window count is 2^(WCE+1) bytes */
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return count_lsb_zeroes(subwindow_cnt) - 1;
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}
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static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
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{
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set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
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set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
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PAACE_M_COHERENCE_REQ);
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}
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static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
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{
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set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
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set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
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PAACE_M_COHERENCE_REQ);
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}
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/** Sets up PPAACE entry for specified liodn
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*
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* @param[in] liodn Logical IO device number
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* @param[in] win_addr starting address of DSA window
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* @param[in] win-size size of DSA window
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* @param[in] omi Operation mapping index -- if ~omi == 0 then omi
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not defined
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* @param[in] stashid cache stash id for associated cpu -- if ~stashid == 0
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then stashid not defined
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* @param[in] snoopid snoop id for hardware coherency -- if ~snoopid == 0
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then snoopid not defined
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* @param[in] subwin_cnt number of sub-windows
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*
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* @return Returns 0 upon success else error code < 0 returned
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*/
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static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
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uint64_t win_size, uint32_t omi,
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uint32_t snoopid, uint32_t stashid,
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uint32_t subwin_cnt)
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{
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struct paace *ppaace;
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if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
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return -1;
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if (win_addr & (win_size - 1))
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return -2;
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if (liodn > NUM_PPAACT_ENTRIES) {
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printf("Entries in PPACT not sufficient\n");
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return -3;
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}
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ppaace = &ppaact[liodn];
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/* window size is 2^(WSE+1) bytes */
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set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
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map_addrspace_size_to_wse(win_size));
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pamu_setup_default_xfer_to_host_ppaace(ppaace);
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if (sizeof(phys_addr_t) > 4)
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ppaace->wbah = (u64)win_addr >> (PAMU_PAGE_SHIFT + 20);
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else
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ppaace->wbah = 0;
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set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL,
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(win_addr >> PAMU_PAGE_SHIFT));
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/* set up operation mapping if it's configured */
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if (omi < OME_NUMBER_ENTRIES) {
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set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
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ppaace->op_encode.index_ot.omi = omi;
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} else if (~omi != 0) {
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return -3;
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}
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/* configure stash id */
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if (~stashid != 0)
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set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid);
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/* configure snoop id */
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if (~snoopid != 0)
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ppaace->domain_attr.to_host.snpid = snoopid;
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if (subwin_cnt) {
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/* window count is 2^(WCE+1) bytes */
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set_bf(ppaace->impl_attr, PAACE_IA_WCE,
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map_subwindow_cnt_to_wce(subwin_cnt));
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set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0x1);
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ppaace->fspi = fspi;
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fspi = fspi + DEFAULT_NUM_SUBWINDOWS - 1;
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} else {
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set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
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}
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asm volatile("sync" : : : "memory");
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/* Mark the ppace entry valid */
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ppaace->addr_bitfields |= PAACE_V_VALID;
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asm volatile("sync" : : : "memory");
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return 0;
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}
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static int pamu_config_spaace(uint32_t liodn,
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uint64_t subwin_size, uint64_t subwin_addr, uint64_t size,
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uint32_t omi, uint32_t snoopid, uint32_t stashid)
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{
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struct paace *paace;
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/* Align start addr of subwin to subwindoe size */
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uint64_t sec_addr = subwin_addr & ~(subwin_size - 1);
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uint64_t end_addr = subwin_addr + size;
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int size_shift = __ilog2_u64(subwin_size);
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uint64_t win_size = 0;
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uint32_t index, swse;
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unsigned long fspi_idx;
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/* Recalculate the size */
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size = end_addr - sec_addr;
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if (!subwin_size)
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return -1;
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if (liodn > NUM_PPAACT_ENTRIES) {
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printf("LIODN No programmed %d > no. of PPAACT entries %d\n",
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liodn, NUM_PPAACT_ENTRIES);
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return -1;
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}
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while (sec_addr < end_addr) {
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debug("sec_addr < end_addr is %llx < %llx\n", sec_addr,
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end_addr);
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paace = &ppaact[liodn];
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if (!paace)
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return -1;
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fspi_idx = paace->fspi;
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/* Calculating the win_size here as if we map in index 0,
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paace entry woudl need to be programmed for SWSE */
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win_size = end_addr - sec_addr;
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win_size = 1 << __ilog2_roundup_64(win_size);
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if (win_size > subwin_size)
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win_size = subwin_size;
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else if (win_size < PAMU_PAGE_SIZE)
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win_size = PAMU_PAGE_SIZE;
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debug("win_size is %llx\n", win_size);
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swse = map_addrspace_size_to_wse(win_size);
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index = sec_addr >> size_shift;
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if (index == 0) {
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set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
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set_bf(paace->addr_bitfields, PAACE_AF_AP,
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PAACE_AP_PERMS_ALL);
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sec_addr += subwin_size;
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continue;
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}
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paace = sec + fspi_idx + index - 1;
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debug("SPAACT:Writing at location %p, index %d\n", paace,
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index);
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pamu_setup_default_xfer_to_host_spaace(paace);
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set_bf(paace->addr_bitfields, SPAACE_AF_LIODN, liodn);
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set_bf(paace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
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/* configure snoop id */
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if (~snoopid != 0)
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paace->domain_attr.to_host.snpid = snoopid;
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if (paace->addr_bitfields & PAACE_V_VALID) {
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debug("Reached overlap condition\n");
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debug("%d < %d\n", get_bf(paace->win_bitfields,
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PAACE_WIN_SWSE), swse);
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if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse)
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set_bf(paace->win_bitfields, PAACE_WIN_SWSE,
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swse);
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} else {
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set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
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}
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paace->addr_bitfields |= PAACE_V_VALID;
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sec_addr += subwin_size;
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}
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return 0;
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}
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int pamu_init(void)
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{
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u32 base_addr = CONFIG_SYS_PAMU_ADDR;
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struct ccsr_pamu *regs;
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u32 i = 0;
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u64 ppaact_phys, ppaact_lim, ppaact_size;
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u64 spaact_phys, spaact_lim, spaact_size;
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ppaact_size = sizeof(struct paace) * NUM_PPAACT_ENTRIES;
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spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
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/* Allocate space for Primary PAACT Table */
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#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR))
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ppaact = (void *)CONFIG_SPL_PPAACT_ADDR;
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#else
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ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
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if (!ppaact)
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return -1;
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#endif
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memset(ppaact, 0, ppaact_size);
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/* Allocate space for Secondary PAACT Table */
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#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR))
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sec = (void *)CONFIG_SPL_SPAACT_ADDR;
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#else
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sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
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if (!sec)
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return -1;
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#endif
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memset(sec, 0, spaact_size);
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ppaact_phys = virt_to_phys((void *)ppaact);
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ppaact_lim = ppaact_phys + ppaact_size;
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spaact_phys = (uint64_t)virt_to_phys((void *)sec);
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spaact_lim = spaact_phys + spaact_size;
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/* Configure all PAMU's */
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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regs = (struct ccsr_pamu *)base_addr;
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out_be32(®s->ppbah, ppaact_phys >> 32);
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out_be32(®s->ppbal, (uint32_t)ppaact_phys);
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out_be32(®s->pplah, (ppaact_lim) >> 32);
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out_be32(®s->pplal, (uint32_t)ppaact_lim);
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if (sec != NULL) {
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out_be32(®s->spbah, spaact_phys >> 32);
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out_be32(®s->spbal, (uint32_t)spaact_phys);
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out_be32(®s->splah, spaact_lim >> 32);
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out_be32(®s->splal, (uint32_t)spaact_lim);
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}
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asm volatile("sync" : : : "memory");
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base_addr += PAMU_OFFSET;
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}
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return 0;
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}
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void pamu_enable(void)
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{
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u32 i = 0;
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u32 base_addr = CONFIG_SYS_PAMU_ADDR;
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
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PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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base_addr += PAMU_OFFSET;
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}
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}
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void pamu_reset(void)
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{
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u32 i = 0;
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u32 base_addr = CONFIG_SYS_PAMU_ADDR;
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struct ccsr_pamu *regs;
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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regs = (struct ccsr_pamu *)base_addr;
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/* Clear PPAACT Base register */
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out_be32(®s->ppbah, 0);
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out_be32(®s->ppbal, 0);
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out_be32(®s->pplah, 0);
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out_be32(®s->pplal, 0);
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out_be32(®s->spbah, 0);
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out_be32(®s->spbal, 0);
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out_be32(®s->splah, 0);
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out_be32(®s->splal, 0);
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clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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base_addr += PAMU_OFFSET;
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}
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}
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void pamu_disable(void)
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{
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u32 i = 0;
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u32 base_addr = CONFIG_SYS_PAMU_ADDR;
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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base_addr += PAMU_OFFSET;
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}
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}
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static uint64_t find_max(uint64_t arr[], int num)
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{
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int i = 0;
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int max = 0;
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for (i = 1 ; i < num; i++)
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if (arr[max] < arr[i])
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max = i;
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return arr[max];
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}
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static uint64_t find_min(uint64_t arr[], int num)
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{
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int i = 0;
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int min = 0;
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for (i = 1 ; i < num; i++)
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if (arr[min] > arr[i])
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min = i;
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return arr[min];
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}
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static uint32_t get_win_cnt(uint64_t size)
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{
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uint32_t win_cnt = DEFAULT_NUM_SUBWINDOWS;
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while (win_cnt && (size/win_cnt) < PAMU_PAGE_SIZE)
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win_cnt >>= 1;
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return win_cnt;
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}
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int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)
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{
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int i = 0;
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int ret = 0;
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uint32_t num_sec_windows = 0;
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uint32_t num_windows = 0;
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uint64_t min_addr, max_addr;
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uint64_t size;
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uint64_t subwin_size;
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int sizebit;
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min_addr = find_min(tbl->start_addr, num_entries);
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max_addr = find_max(tbl->end_addr, num_entries);
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size = max_addr - min_addr + 1;
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if (!size)
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return -1;
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sizebit = __ilog2_roundup_64(size);
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size = 1 << sizebit;
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debug("min start_addr is %llx\n", min_addr);
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debug("max end_addr is %llx\n", max_addr);
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debug("size found is %llx\n", size);
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if (size < PAMU_PAGE_SIZE)
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size = PAMU_PAGE_SIZE;
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while (1) {
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min_addr = min_addr & ~(size - 1);
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if (min_addr + size > max_addr)
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break;
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size <<= 1;
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if (!size)
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return -1;
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}
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debug("PAACT :Base addr is %llx\n", min_addr);
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debug("PAACT : Size is %llx\n", size);
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num_windows = get_win_cnt(size);
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/* For a single window, no spaact entries are required
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* sec_sub_window count = 0 */
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if (num_windows > 1)
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num_sec_windows = num_windows;
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else
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num_sec_windows = 0;
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ret = pamu_config_ppaace(liodn, min_addr,
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size , -1, -1, -1, num_sec_windows);
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if (ret < 0)
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return ret;
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debug("configured ppace\n");
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if (num_sec_windows) {
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subwin_size = size >> count_lsb_zeroes(num_sec_windows);
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debug("subwin_size is %llx\n", subwin_size);
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for (i = 0; i < num_entries; i++) {
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ret = pamu_config_spaace(liodn,
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subwin_size, tbl->start_addr[i] - min_addr,
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tbl->size[i], -1, -1, -1);
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if (ret < 0)
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return ret;
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}
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}
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return ret;
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}
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