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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
641 lines
16 KiB
C
641 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2011, Marvell Semiconductor Inc.
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* Lei Wen <leiwen@marvell.com>
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*
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* Back ported to the 8xx platform (from the 8260 platform) by
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* Murray.Jensen@cmst.csiro.au, 27-Jan-01.
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*/
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#include <common.h>
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#include <errno.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <sdhci.h>
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#if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
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void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;
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#else
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void *aligned_buffer;
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#endif
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static void sdhci_reset(struct sdhci_host *host, u8 mask)
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{
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unsigned long timeout;
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/* Wait max 100 ms */
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timeout = 100;
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sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
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while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
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if (timeout == 0) {
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printf("%s: Reset 0x%x never completed.\n",
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__func__, (int)mask);
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return;
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}
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timeout--;
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udelay(1000);
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}
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}
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static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd)
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{
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int i;
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if (cmd->resp_type & MMC_RSP_136) {
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/* CRC is stripped so we need to do some shifting. */
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for (i = 0; i < 4; i++) {
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cmd->response[i] = sdhci_readl(host,
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SDHCI_RESPONSE + (3-i)*4) << 8;
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if (i != 3)
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cmd->response[i] |= sdhci_readb(host,
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SDHCI_RESPONSE + (3-i)*4-1);
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}
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} else {
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cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE);
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}
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}
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static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
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{
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int i;
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char *offs;
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for (i = 0; i < data->blocksize; i += 4) {
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offs = data->dest + i;
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if (data->flags == MMC_DATA_READ)
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*(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER);
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else
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sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER);
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}
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}
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static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
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unsigned int start_addr)
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{
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unsigned int stat, rdy, mask, timeout, block = 0;
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bool transfer_done = false;
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#ifdef CONFIG_MMC_SDHCI_SDMA
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unsigned char ctrl;
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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ctrl &= ~SDHCI_CTRL_DMA_MASK;
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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#endif
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timeout = 1000000;
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rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
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mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
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do {
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stat = sdhci_readl(host, SDHCI_INT_STATUS);
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if (stat & SDHCI_INT_ERROR) {
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pr_debug("%s: Error detected in status(0x%X)!\n",
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__func__, stat);
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return -EIO;
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}
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if (!transfer_done && (stat & rdy)) {
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if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask))
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continue;
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sdhci_writel(host, rdy, SDHCI_INT_STATUS);
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sdhci_transfer_pio(host, data);
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data->dest += data->blocksize;
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if (++block >= data->blocks) {
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/* Keep looping until the SDHCI_INT_DATA_END is
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* cleared, even if we finished sending all the
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* blocks.
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*/
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transfer_done = true;
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continue;
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}
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}
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#ifdef CONFIG_MMC_SDHCI_SDMA
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if (!transfer_done && (stat & SDHCI_INT_DMA_END)) {
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sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
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start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
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start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
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sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
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}
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#endif
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if (timeout-- > 0)
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udelay(10);
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else {
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printf("%s: Transfer data timeout\n", __func__);
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return -ETIMEDOUT;
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}
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} while (!(stat & SDHCI_INT_DATA_END));
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return 0;
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}
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/*
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* No command will be sent by driver if card is busy, so driver must wait
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* for card ready state.
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* Every time when card is busy after timeout then (last) timeout value will be
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* increased twice but only if it doesn't exceed global defined maximum.
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* Each function call will use last timeout value.
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*/
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#define SDHCI_CMD_MAX_TIMEOUT 3200
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#define SDHCI_CMD_DEFAULT_TIMEOUT 100
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#define SDHCI_READ_STATUS_TIMEOUT 1000
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#ifdef CONFIG_DM_MMC
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static int sdhci_send_command(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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#else
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static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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#endif
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struct sdhci_host *host = mmc->priv;
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unsigned int stat = 0;
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int ret = 0;
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int trans_bytes = 0, is_aligned = 1;
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u32 mask, flags, mode;
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unsigned int time = 0, start_addr = 0;
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int mmc_dev = mmc_get_blk_desc(mmc)->devnum;
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unsigned start = get_timer(0);
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/* Timeout unit - ms */
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static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
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mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
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/* We shouldn't wait for data inihibit for stop commands, even
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though they might use busy signaling */
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
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mask &= ~SDHCI_DATA_INHIBIT;
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while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
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if (time >= cmd_timeout) {
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printf("%s: MMC: %d busy ", __func__, mmc_dev);
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if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) {
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cmd_timeout += cmd_timeout;
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printf("timeout increasing to: %u ms.\n",
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cmd_timeout);
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} else {
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puts("timeout.\n");
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return -ECOMM;
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}
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}
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time++;
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udelay(1000);
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}
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sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
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mask = SDHCI_INT_RESPONSE;
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if (!(cmd->resp_type & MMC_RSP_PRESENT))
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flags = SDHCI_CMD_RESP_NONE;
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else if (cmd->resp_type & MMC_RSP_136)
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flags = SDHCI_CMD_RESP_LONG;
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else if (cmd->resp_type & MMC_RSP_BUSY) {
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flags = SDHCI_CMD_RESP_SHORT_BUSY;
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if (data)
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mask |= SDHCI_INT_DATA_END;
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} else
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flags = SDHCI_CMD_RESP_SHORT;
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if (cmd->resp_type & MMC_RSP_CRC)
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flags |= SDHCI_CMD_CRC;
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if (cmd->resp_type & MMC_RSP_OPCODE)
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flags |= SDHCI_CMD_INDEX;
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if (data)
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flags |= SDHCI_CMD_DATA;
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/* Set Transfer mode regarding to data flag */
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if (data) {
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sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
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mode = SDHCI_TRNS_BLK_CNT_EN;
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trans_bytes = data->blocks * data->blocksize;
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if (data->blocks > 1)
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mode |= SDHCI_TRNS_MULTI;
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if (data->flags == MMC_DATA_READ)
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mode |= SDHCI_TRNS_READ;
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#ifdef CONFIG_MMC_SDHCI_SDMA
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if (data->flags == MMC_DATA_READ)
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start_addr = (unsigned long)data->dest;
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else
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start_addr = (unsigned long)data->src;
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if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
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(start_addr & 0x7) != 0x0) {
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is_aligned = 0;
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start_addr = (unsigned long)aligned_buffer;
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if (data->flags != MMC_DATA_READ)
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memcpy(aligned_buffer, data->src, trans_bytes);
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}
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#if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
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/*
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* Always use this bounce-buffer when
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* CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is defined
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*/
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is_aligned = 0;
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start_addr = (unsigned long)aligned_buffer;
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if (data->flags != MMC_DATA_READ)
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memcpy(aligned_buffer, data->src, trans_bytes);
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#endif
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sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
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mode |= SDHCI_TRNS_DMA;
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#endif
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sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
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data->blocksize),
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SDHCI_BLOCK_SIZE);
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sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
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sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
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} else if (cmd->resp_type & MMC_RSP_BUSY) {
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sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
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}
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sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
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#ifdef CONFIG_MMC_SDHCI_SDMA
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if (data) {
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trans_bytes = ALIGN(trans_bytes, CONFIG_SYS_CACHELINE_SIZE);
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flush_cache(start_addr, trans_bytes);
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}
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#endif
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sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
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start = get_timer(0);
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do {
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stat = sdhci_readl(host, SDHCI_INT_STATUS);
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if (stat & SDHCI_INT_ERROR)
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break;
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if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) {
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if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) {
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return 0;
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} else {
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printf("%s: Timeout for status update!\n",
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__func__);
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return -ETIMEDOUT;
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}
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}
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} while ((stat & mask) != mask);
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if ((stat & (SDHCI_INT_ERROR | mask)) == mask) {
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sdhci_cmd_done(host, cmd);
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sdhci_writel(host, mask, SDHCI_INT_STATUS);
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} else
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ret = -1;
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if (!ret && data)
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ret = sdhci_transfer_data(host, data, start_addr);
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if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
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udelay(1000);
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stat = sdhci_readl(host, SDHCI_INT_STATUS);
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sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
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if (!ret) {
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if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
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!is_aligned && (data->flags == MMC_DATA_READ))
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memcpy(data->dest, aligned_buffer, trans_bytes);
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return 0;
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}
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sdhci_reset(host, SDHCI_RESET_CMD);
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sdhci_reset(host, SDHCI_RESET_DATA);
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if (stat & SDHCI_INT_TIMEOUT)
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return -ETIMEDOUT;
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else
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return -ECOMM;
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}
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static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
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{
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struct sdhci_host *host = mmc->priv;
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unsigned int div, clk = 0, timeout;
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/* Wait max 20 ms */
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timeout = 200;
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while (sdhci_readl(host, SDHCI_PRESENT_STATE) &
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(SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
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if (timeout == 0) {
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printf("%s: Timeout to wait cmd & data inhibit\n",
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__func__);
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return -EBUSY;
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}
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timeout--;
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udelay(100);
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}
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sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
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if (clock == 0)
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return 0;
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if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
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/*
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* Check if the Host Controller supports Programmable Clock
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* Mode.
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*/
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if (host->clk_mul) {
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for (div = 1; div <= 1024; div++) {
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if ((host->max_clk / div) <= clock)
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break;
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}
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/*
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* Set Programmable Clock Mode in the Clock
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* Control register.
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*/
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clk = SDHCI_PROG_CLOCK_MODE;
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div--;
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} else {
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/* Version 3.00 divisors must be a multiple of 2. */
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if (host->max_clk <= clock) {
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div = 1;
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} else {
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for (div = 2;
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div < SDHCI_MAX_DIV_SPEC_300;
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div += 2) {
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if ((host->max_clk / div) <= clock)
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break;
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}
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}
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div >>= 1;
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}
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} else {
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/* Version 2.00 divisors must be a power of 2. */
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for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
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if ((host->max_clk / div) <= clock)
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break;
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}
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div >>= 1;
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}
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if (host->ops && host->ops->set_clock)
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host->ops->set_clock(host, div);
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clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
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clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
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<< SDHCI_DIVIDER_HI_SHIFT;
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clk |= SDHCI_CLOCK_INT_EN;
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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/* Wait max 20 ms */
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timeout = 20;
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while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
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& SDHCI_CLOCK_INT_STABLE)) {
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if (timeout == 0) {
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printf("%s: Internal clock never stabilised.\n",
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__func__);
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return -EBUSY;
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}
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timeout--;
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udelay(1000);
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}
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clk |= SDHCI_CLOCK_CARD_EN;
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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return 0;
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}
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static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
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{
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u8 pwr = 0;
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if (power != (unsigned short)-1) {
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switch (1 << power) {
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case MMC_VDD_165_195:
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pwr = SDHCI_POWER_180;
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break;
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case MMC_VDD_29_30:
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case MMC_VDD_30_31:
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pwr = SDHCI_POWER_300;
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break;
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case MMC_VDD_32_33:
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case MMC_VDD_33_34:
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pwr = SDHCI_POWER_330;
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break;
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}
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}
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if (pwr == 0) {
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sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
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return;
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}
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pwr |= SDHCI_POWER_ON;
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sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
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}
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#ifdef CONFIG_DM_MMC
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static int sdhci_set_ios(struct udevice *dev)
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{
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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#else
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static int sdhci_set_ios(struct mmc *mmc)
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{
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#endif
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u32 ctrl;
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struct sdhci_host *host = mmc->priv;
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if (host->ops && host->ops->set_control_reg)
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host->ops->set_control_reg(host);
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if (mmc->clock != host->clock)
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sdhci_set_clock(mmc, mmc->clock);
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/* Set bus width */
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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if (mmc->bus_width == 8) {
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
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(host->quirks & SDHCI_QUIRK_USE_WIDE8))
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ctrl |= SDHCI_CTRL_8BITBUS;
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} else {
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if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
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(host->quirks & SDHCI_QUIRK_USE_WIDE8))
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ctrl &= ~SDHCI_CTRL_8BITBUS;
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if (mmc->bus_width == 4)
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ctrl |= SDHCI_CTRL_4BITBUS;
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else
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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}
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if (mmc->clock > 26000000)
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ctrl |= SDHCI_CTRL_HISPD;
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else
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ctrl &= ~SDHCI_CTRL_HISPD;
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if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) ||
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(host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE))
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ctrl &= ~SDHCI_CTRL_HISPD;
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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/* If available, call the driver specific "post" set_ios() function */
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if (host->ops && host->ops->set_ios_post)
|
|
host->ops->set_ios_post(host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sdhci_init(struct mmc *mmc)
|
|
{
|
|
struct sdhci_host *host = mmc->priv;
|
|
|
|
sdhci_reset(host, SDHCI_RESET_ALL);
|
|
|
|
if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
|
|
aligned_buffer = memalign(8, 512*1024);
|
|
if (!aligned_buffer) {
|
|
printf("%s: Aligned buffer alloc failed!!!\n",
|
|
__func__);
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
|
|
|
|
if (host->ops && host->ops->get_cd)
|
|
host->ops->get_cd(host);
|
|
|
|
/* Enable only interrupts served by the SD controller */
|
|
sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
|
|
SDHCI_INT_ENABLE);
|
|
/* Mask all sdhci interrupt sources */
|
|
sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_DM_MMC
|
|
int sdhci_probe(struct udevice *dev)
|
|
{
|
|
struct mmc *mmc = mmc_get_mmc_dev(dev);
|
|
|
|
return sdhci_init(mmc);
|
|
}
|
|
|
|
const struct dm_mmc_ops sdhci_ops = {
|
|
.send_cmd = sdhci_send_command,
|
|
.set_ios = sdhci_set_ios,
|
|
};
|
|
#else
|
|
static const struct mmc_ops sdhci_ops = {
|
|
.send_cmd = sdhci_send_command,
|
|
.set_ios = sdhci_set_ios,
|
|
.init = sdhci_init,
|
|
};
|
|
#endif
|
|
|
|
int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
|
u32 f_max, u32 f_min)
|
|
{
|
|
u32 caps, caps_1;
|
|
|
|
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
|
|
|
#ifdef CONFIG_MMC_SDHCI_SDMA
|
|
if (!(caps & SDHCI_CAN_DO_SDMA)) {
|
|
printf("%s: Your controller doesn't support SDMA!!\n",
|
|
__func__);
|
|
return -EINVAL;
|
|
}
|
|
#endif
|
|
if (host->quirks & SDHCI_QUIRK_REG32_RW)
|
|
host->version =
|
|
sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
|
|
else
|
|
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
|
|
|
|
cfg->name = host->name;
|
|
#ifndef CONFIG_DM_MMC
|
|
cfg->ops = &sdhci_ops;
|
|
#endif
|
|
|
|
/* Check whether the clock multiplier is supported or not */
|
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
|
caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
|
|
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
|
|
SDHCI_CLOCK_MUL_SHIFT;
|
|
}
|
|
|
|
if (host->max_clk == 0) {
|
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
|
|
host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
|
|
SDHCI_CLOCK_BASE_SHIFT;
|
|
else
|
|
host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) >>
|
|
SDHCI_CLOCK_BASE_SHIFT;
|
|
host->max_clk *= 1000000;
|
|
if (host->clk_mul)
|
|
host->max_clk *= host->clk_mul;
|
|
}
|
|
if (host->max_clk == 0) {
|
|
printf("%s: Hardware doesn't specify base clock frequency\n",
|
|
__func__);
|
|
return -EINVAL;
|
|
}
|
|
if (f_max && (f_max < host->max_clk))
|
|
cfg->f_max = f_max;
|
|
else
|
|
cfg->f_max = host->max_clk;
|
|
if (f_min)
|
|
cfg->f_min = f_min;
|
|
else {
|
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
|
|
cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
|
|
else
|
|
cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
|
|
}
|
|
cfg->voltages = 0;
|
|
if (caps & SDHCI_CAN_VDD_330)
|
|
cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
if (caps & SDHCI_CAN_VDD_300)
|
|
cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
|
|
if (caps & SDHCI_CAN_VDD_180)
|
|
cfg->voltages |= MMC_VDD_165_195;
|
|
|
|
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
|
|
cfg->voltages |= host->voltages;
|
|
|
|
cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
|
|
|
|
/* Since Host Controller Version3.0 */
|
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
|
if (!(caps & SDHCI_CAN_DO_8BIT))
|
|
cfg->host_caps &= ~MMC_MODE_8BIT;
|
|
}
|
|
|
|
if (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE) {
|
|
cfg->host_caps &= ~MMC_MODE_HS;
|
|
cfg->host_caps &= ~MMC_MODE_HS_52MHz;
|
|
}
|
|
|
|
if (host->host_caps)
|
|
cfg->host_caps |= host->host_caps;
|
|
|
|
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_BLK
|
|
int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)
|
|
{
|
|
return mmc_bind(dev, mmc, cfg);
|
|
}
|
|
#else
|
|
int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min)
|
|
{
|
|
int ret;
|
|
|
|
ret = sdhci_setup_cfg(&host->cfg, host, f_max, f_min);
|
|
if (ret)
|
|
return ret;
|
|
|
|
host->mmc = mmc_create(&host->cfg, host);
|
|
if (host->mmc == NULL) {
|
|
printf("%s: mmc create fail!\n", __func__);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|