mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
569a191a86
Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
114 lines
1.8 KiB
Plaintext
114 lines
1.8 KiB
Plaintext
/*
|
|
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include "socfpga_cyclone5.dtsi"
|
|
|
|
/ {
|
|
model = "samtec VIN|ING FPGA";
|
|
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = &gmac1;
|
|
udc0 = &usb0;
|
|
};
|
|
|
|
memory {
|
|
name = "memory";
|
|
device_type = "memory";
|
|
reg = <0x0 0x40000000>; /* 1GB */
|
|
};
|
|
|
|
soc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
};
|
|
|
|
&gmac1 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
|
|
rxd0-skew-ps = <0>;
|
|
rxd1-skew-ps = <0>;
|
|
rxd2-skew-ps = <0>;
|
|
rxd3-skew-ps = <0>;
|
|
txen-skew-ps = <0>;
|
|
txc-skew-ps = <2600>;
|
|
rxdv-skew-ps = <0>;
|
|
rxc-skew-ps = <2000>;
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
|
|
rtc: rtc@68 {
|
|
compatible = "stm,m41t82";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
u-boot,dm-pre-reloc;
|
|
|
|
flash0: n25q128@0 {
|
|
u-boot,dm-pre-reloc;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "n25q128", "spi-flash";
|
|
reg = <0>; /* chip select */
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
page-size = <256>;
|
|
block-size = <16>; /* 2^16, 64KB */
|
|
read-delay = <4>; /* delay value in read data capture register */
|
|
tshsl-ns = <50>;
|
|
tsd2d-ns = <50>;
|
|
tchsh-ns = <4>;
|
|
tslch-ns = <4>;
|
|
};
|
|
|
|
flash1: n25q00@1 {
|
|
u-boot,dm-pre-reloc;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "n25q00", "spi-flash";
|
|
reg = <1>; /* chip select */
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
page-size = <256>;
|
|
block-size = <16>; /* 2^16, 64KB */
|
|
read-delay = <4>; /* delay value in read data capture register */
|
|
tshsl-ns = <50>;
|
|
tsd2d-ns = <50>;
|
|
tchsh-ns = <4>;
|
|
tslch-ns = <4>;
|
|
};
|
|
};
|
|
|
|
&usb0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
status = "okay";
|
|
};
|