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f1218f0b4f
Add clk-main driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
36 lines
1.3 KiB
C
36 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#ifndef __AT91_PMC_H__
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#define __AT91_PMC_H__
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#include <linux/bitops.h>
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#include <linux/io.h>
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/* Keep a range of 256 available clocks for every clock type. */
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#define AT91_TO_CLK_ID(_t, _i) (((_t) << 8) | ((_i) & 0xff))
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#define AT91_CLK_ID_TO_DID(_i) ((_i) & 0xff)
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struct clk *at91_clk_main_rc(void __iomem *reg, const char *name,
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const char *parent_name);
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struct clk *at91_clk_main_osc(void __iomem *reg, const char *name,
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const char *parent_name, bool bypass);
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struct clk *at91_clk_rm9200_main(void __iomem *reg, const char *name,
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const char *parent_name);
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struct clk *at91_clk_sam9x5_main(void __iomem *reg, const char *name,
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const char * const *parent_names, int num_parents,
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const u32 *mux_table, int type);
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int at91_clk_mux_val_to_index(const u32 *table, u32 num_parents, u32 val);
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int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index);
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void pmc_read(void __iomem *base, unsigned int off, unsigned int *val);
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void pmc_write(void __iomem *base, unsigned int off, unsigned int val);
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void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
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unsigned int bits);
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#endif
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