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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
170 lines
4.5 KiB
C
170 lines
4.5 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8xx.h>
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#include <commproc.h>
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#include <common.h>
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#include "../common/fpga.h"
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fpga_t fpga_list[] = {
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{ "PUMA" , PUMA_CONF_BASE ,
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CFG_PC_PUMA_INIT , CFG_PC_PUMA_PROG , CFG_PC_PUMA_DONE }
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};
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int fpga_count = sizeof(fpga_list) / sizeof(fpga_t);
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void can_driver_enable (void);
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void can_driver_disable (void);
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#define _NOT_USED_ 0xFFFFFFFF
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/*
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* PUMA access using UPM B
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*/
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const uint puma_table[] =
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{
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/*
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* Single Read. (Offset 0 in UPM RAM)
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*/
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_,
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/*
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* Precharge and MRS
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*/
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_NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Burst Read. (Offset 8 in UPM RAM)
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*/
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Single Write. (Offset 18 in UPM RAM)
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*/
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0x0FFCF804, 0x0FFCF400, 0x3FFDFC47, /* last */
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_NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Burst Write. (Offset 20 in UPM RAM)
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*/
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Refresh (Offset 30 in UPM RAM)
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*/
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Exception. (Offset 3c in UPM RAM)
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*/
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0x7FFFFC07, /* last */
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_NOT_USED_, _NOT_USED_, _NOT_USED_,
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};
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ulong fpga_control (fpga_t* fpga, int cmd)
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{
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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volatile memctl8xx_t *memctl = &immr->im_memctl;
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switch (cmd) {
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case FPGA_INIT_IS_HIGH:
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immr->im_ioport.iop_pcdir &= ~fpga->init_mask; /* input */
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return (immr->im_ioport.iop_pcdat & fpga->init_mask) ? 1:0;
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case FPGA_INIT_SET_LOW:
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immr->im_ioport.iop_pcdir |= fpga->init_mask; /* output */
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immr->im_ioport.iop_pcdat &= ~fpga->init_mask;
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break;
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case FPGA_INIT_SET_HIGH:
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immr->im_ioport.iop_pcdir |= fpga->init_mask; /* output */
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immr->im_ioport.iop_pcdat |= fpga->init_mask;
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break;
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case FPGA_PROG_SET_LOW:
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immr->im_ioport.iop_pcdat &= ~fpga->prog_mask;
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break;
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case FPGA_PROG_SET_HIGH:
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immr->im_ioport.iop_pcdat |= fpga->prog_mask;
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break;
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case FPGA_DONE_IS_HIGH:
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return (immr->im_ioport.iop_pcdat & fpga->done_mask) ? 1:0;
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case FPGA_READ_MODE:
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/* disable FPGA in memory controller */
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memctl->memc_br4 = 0;
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memctl->memc_or4 = PUMA_CONF_OR_READ;
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memctl->memc_br4 = PUMA_CONF_BR_READ;
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/* (re-) enable CAN drivers */
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can_driver_enable ();
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break;
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case FPGA_LOAD_MODE:
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/* disable FPGA in memory controller */
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memctl->memc_br4 = 0;
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/*
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* We must disable the CAN drivers first because
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* they use UPM B, too.
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*/
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can_driver_disable ();
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/*
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* Configure UPMB for FPGA
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*/
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upmconfig(UPMB,(uint *)puma_table,sizeof(puma_table)/sizeof(uint));
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memctl->memc_or4 = PUMA_CONF_OR_LOAD;
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memctl->memc_br4 = PUMA_CONF_BR_LOAD;
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break;
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case FPGA_GET_ID:
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return *(volatile ulong *)fpga->conf_base;
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case FPGA_INIT_PORTS:
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immr->im_ioport.iop_pcpar &= ~fpga->init_mask; /* INIT I/O */
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immr->im_ioport.iop_pcso &= ~fpga->init_mask;
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immr->im_ioport.iop_pcdir &= ~fpga->init_mask;
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immr->im_ioport.iop_pcpar &= ~fpga->prog_mask; /* PROG Output */
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immr->im_ioport.iop_pcso &= ~fpga->prog_mask;
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immr->im_ioport.iop_pcdir |= fpga->prog_mask;
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immr->im_ioport.iop_pcpar &= ~fpga->done_mask; /* DONE Input */
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immr->im_ioport.iop_pcso &= ~fpga->done_mask;
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immr->im_ioport.iop_pcdir &= ~fpga->done_mask;
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break;
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}
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return 0;
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}
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