Stephen George f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access ... Configuring DCSRCR to define the DCSR space to be 1G instead of the default 4M. DCSRCR only allows selection of either 4M or 1G. Most DCSR registers are within 4M but the Nexus trace buffer is located at offset 16M within the DCSR. Configuring the LAW to be 32M to allow access to the Nexus trace buffer. No TLB modification is required since accessing the Nexus trace buffer from within u-boot is not required. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-07-29 08:53:37 -05:00
..
cpu	powerpc/85xx: Adding configuration for DCSRCR to enable 32M access	2011-07-29 08:53:37 -05:00
include/asm	powerpc/85xx: Adding configuration for DCSRCR to enable 32M access	2011-07-29 08:53:37 -05:00
lib	powerpc/85xx: Fix setting of EPAPR_MAGIC value	2011-07-29 08:53:37 -05:00
config.mk	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00