mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-03 00:33:45 +09:00
98149d72f3
With the driver model conversion we are going to be using driver model for SPI and not for I2C. This works OK so long as a board doesn't need both dm and non-dm versions of the cros_ec driver. Since pit uses SPI and snow uses I2C we need to split the configs so that only one driver is compiled for each platform. We can fix this later when driver model supports I2C. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
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/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG EXYNOS5250 board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_5250_H
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#define __CONFIG_5250_H
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#include <configs/exynos5-dt.h>
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#define CONFIG_EXYNOS5250
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_TEXT_BASE 0x43E00000
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/* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */
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#define MACH_TYPE_SMDK5250 3774
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#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250
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#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
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#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
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/* USB */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_XHCI
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#define CONFIG_USB_XHCI_EXYNOS
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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#define CONFIG_SPL_TEXT_BASE 0x02023400
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#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
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#define CONFIG_SYS_PROMPT "SMDK5250 # "
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#define CONFIG_IDENT_STRING " for SMDK5250"
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#define CONFIG_IRAM_STACK 0x02050000
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
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/* PMIC */
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#define CONFIG_POWER_MAX77686
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#define CONFIG_POWER_TPS65090_I2C
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/* Sound */
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#define CONFIG_CMD_SOUND
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#ifdef CONFIG_CMD_SOUND
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#define CONFIG_SOUND
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#define CONFIG_I2S_SAMSUNG
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#define CONFIG_I2S
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#define CONFIG_SOUND_MAX98095
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#define CONFIG_SOUND_WM8994
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#endif
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/* I2C */
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#define CONFIG_MAX_I2C_NUM 8
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/* Display */
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#define CONFIG_LCD
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#ifdef CONFIG_LCD
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#define CONFIG_EXYNOS_FB
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#define CONFIG_EXYNOS_DP
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#define LCD_BPP LCD_COLOR16
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#endif
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/* DRAM Memory Banks */
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#define CONFIG_NR_DRAM_BANKS 8
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#endif /* __CONFIG_5250_H */
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