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https://github.com/brain-hackers/u-boot-brain
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a14a94469c
Mpq101 is a RapidIO development board in AMC form factor, featuring MPC8548 processor, 512MB of hardwired DDR2 RAM, 128MB of hardwired NAND flash memory, real time clock and additional serial EEPROM on i2c bus (enabled). USB controller is available, but not presently enabled. Additional board information is available at: http://www.mc.com/products/boards/ensemble_mpq101_rapidio_powerquicc_iii.aspx Environment is configured to precede the actual u-boot image so that it's located at the beginning of flash erase block (made necessary by the recent changes to the embedded environment handling). This is achieved by means of custom ld script. Signed-off-by: Alex Dubov <oakad@yahoo.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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/*
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* LAW(Local Access Window) configuration:
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*
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* 0x0000_0000 0x1fff_ffff DDR SYS_SDRAM_SIZE
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* 0xc000_0000 0xdfff_ffff RapidIO (set elsewhere) 512M
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* 0xe000_0000 0xe000_ffff CCSR (set elsewhere) 1M
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* 0xf000_0000 0xffff_ffff LBC options + FLASH 256M
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*
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* Notes:
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* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
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* If flash is 8M at default position (last 8M), no LAW needed.
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*
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* LAW 0 is reserved for boot mapping
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*/
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struct law_entry law_table[] = {
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SET_LAW(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE_LOG - 1,
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LAW_TRGT_IF_DDR_1),
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SET_LAW(CONFIG_SYS_LBC_OPTION_BASE_PHYS, LAW_SIZE_256M,
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LAW_TRGT_IF_LBC)
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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