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https://github.com/brain-hackers/u-boot-brain
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![Stephen Warren](/assets/img/avatar_default.png)
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This patch adds the relevant DT to enable the PCI controller and configure the XUSB padctl pin muxing, and code to turn on the PCI power and enable PCI features in U-Boot. I have only tested the x4 slot. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
111 lines
1.8 KiB
Plaintext
111 lines
1.8 KiB
Plaintext
/dts-v1/;
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#include "tegra210.dtsi"
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/ {
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model = "NVIDIA P2371-2180";
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compatible = "nvidia,p2371-2180", "nvidia,tegra210";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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i2c0 = "/i2c@0,7000d000";
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sdhci0 = "/sdhci@0,700b0600";
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sdhci1 = "/sdhci@0,700b0000";
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usb0 = "/usb@0,7d000000";
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};
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memory {
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reg = <0x0 0x80000000 0x0 0xc0000000>;
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};
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pcie-controller@0,01003000 {
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status = "okay";
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pci@1,0 {
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status = "okay";
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};
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pci@2,0 {
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status = "okay";
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};
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};
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padctl@0,7009f000 {
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pinctrl-0 = <&padctl_default>;
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pinctrl-names = "default";
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padctl_default: pinmux {
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xusb {
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nvidia,lanes = "otg-1", "otg-2";
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nvidia,function = "xusb";
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nvidia,iddq = <0>;
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};
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usb3 {
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nvidia,lanes = "pcie-5", "pcie-6";
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nvidia,function = "usb3";
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nvidia,iddq = <0>;
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};
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pcie-x1 {
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nvidia,lanes = "pcie-0";
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nvidia,function = "pcie-x1";
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nvidia,iddq = <0>;
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};
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pcie-x4 {
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nvidia,lanes = "pcie-1", "pcie-2",
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"pcie-3", "pcie-4";
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nvidia,function = "pcie-x4";
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nvidia,iddq = <0>;
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};
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sata {
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nvidia,lanes = "sata-0";
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nvidia,function = "sata";
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nvidia,iddq = <0>;
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};
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};
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};
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sdhci@0,700b0000 {
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status = "okay";
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cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
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power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
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wp-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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};
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sdhci@0,700b0600 {
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status = "okay";
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bus-width = <8>;
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};
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i2c@0,7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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};
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usb@0,7d000000 {
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status = "okay";
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dr_mode = "otg";
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg = <0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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};
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