u-boot-brain/arch
Andreas Dannenberg 12df71cd74 armv7R: dts: k3: am654: Switch DMSC TX message thread ID
Switch from using the high priority DMSC transmit message queue used
by the secure R5 MCU island boot context to the low priority message
queue. While the change in priority is irrelevant for the current boot
architecture it however gives us access to a deeper message queue that
will allow us to buffer more messages. This is an important aspect when
sending several messages without requesting and waiting for a response
in a row which is a communication scheme used during core shutdown for
example. See AM654 TISCI User Guide for additional details.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-03 07:23:17 -04:00
..
arc ARC: [plat-axs10x]: migrate to DM_MMC 2019-04-18 09:12:38 +03:00
arm armv7R: dts: k3: am654: Switch DMSC TX message thread ID 2019-05-03 07:23:17 -04:00
m68k m68k: ColdFire mcf5441x, add eSDHC support 2018-09-16 00:01:13 +02:00
microblaze arch: types.h: factor out fixed width typedefs to int-ll64.h 2018-09-10 20:48:16 -04:00
mips watchdog: Implement generic watchdog_reset() version 2019-04-26 09:16:32 +02:00
nds32 dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
nios2 .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
powerpc watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup 2019-04-26 09:16:32 +02:00
riscv dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
sandbox Various minor sandbox iumprovements 2019-04-24 12:27:29 -04:00
sh sh: bitops: add hweight*() macros 2019-02-07 15:33:21 +05:30
x86 x86: dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
xtensa xtensa: use asm-generic/atomic.h 2018-09-25 21:49:18 -04:00
.gitignore
Kconfig riscv: Enable create symlink using kconfig 2019-02-27 09:12:33 +08:00