York Sun ef9a5fd864 armv8: fsl-layerscape: Fix "cpu status" command ... The core position is not continuous for some SoCs. For example, valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some registers (including boot release register) only count existing cores. Current implementation of cpu_mask() complies with the continuous numbering. However, command "cpu status" queries the spin table with actual core position. Add functions to calculate core position from core number, to correctly calculate offsets. Tested on LS2080ARDB and LS1043ARDB. Signed-off-by: York Sun <york.sun@nxp.com>		2016-10-06 09:56:57 -07:00
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asm	armv8: fsl-layerscape: Fix "cpu status" command	2016-10-06 09:56:57 -07:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00