mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 06:33:45 +09:00
![Simon Glass](/assets/img/avatar_default.png)
When TPL is in use, U-Boot proper should support initing the VGA ROM even though the 32-bit init portion is in SPL. Update the condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
384 lines
10 KiB
C
384 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2014 Google, Inc
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*
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* From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
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*
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* Modifications are:
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* Copyright (C) 2003-2004 Linux Networx
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* (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
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* Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
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* Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
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* Copyright (C) 2005-2006 Tyan
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* (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
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* Copyright (C) 2005-2009 coresystems GmbH
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* (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
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*
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* PCI Bus Services, see include/linux/pci.h for further explanation.
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*
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* Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
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* David Mosberger-Tang
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*
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* Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*/
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#include <common.h>
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#include <bios_emul.h>
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <pci.h>
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#include <pci_rom.h>
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#include <vbe.h>
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#include <video.h>
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#include <video_fb.h>
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#include <linux/screen_info.h>
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#ifdef CONFIG_X86
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#include <asm/acpi_s3.h>
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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__weak bool board_should_run_oprom(struct udevice *dev)
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{
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#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
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if (gd->arch.prev_sleep_state == ACPI_S3) {
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if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
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return true;
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else
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return false;
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}
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#endif
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return true;
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}
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__weak bool board_should_load_oprom(struct udevice *dev)
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{
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return true;
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}
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__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
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{
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return vendev;
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}
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static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
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{
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struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
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struct pci_rom_header *rom_header;
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struct pci_rom_data *rom_data;
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u16 rom_vendor, rom_device;
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u32 rom_class;
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u32 vendev;
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u32 mapped_vendev;
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u32 rom_address;
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vendev = pplat->vendor << 16 | pplat->device;
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mapped_vendev = board_map_oprom_vendev(vendev);
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if (vendev != mapped_vendev)
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debug("Device ID mapped to %#08x\n", mapped_vendev);
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#ifdef CONFIG_VGA_BIOS_ADDR
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rom_address = CONFIG_VGA_BIOS_ADDR;
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#else
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dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
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if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
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debug("%s: rom_address=%x\n", __func__, rom_address);
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return -ENOENT;
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}
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/* Enable expansion ROM address decoding. */
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dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
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rom_address | PCI_ROM_ADDRESS_ENABLE);
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#endif
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debug("Option ROM address %x\n", rom_address);
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rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
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debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
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le16_to_cpu(rom_header->signature),
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rom_header->size * 512, le16_to_cpu(rom_header->data));
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if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
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printf("Incorrect expansion ROM header signature %04x\n",
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le16_to_cpu(rom_header->signature));
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#ifndef CONFIG_VGA_BIOS_ADDR
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/* Disable expansion ROM address decoding */
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dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
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#endif
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return -EINVAL;
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}
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rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
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rom_vendor = le16_to_cpu(rom_data->vendor);
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rom_device = le16_to_cpu(rom_data->device);
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debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
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rom_vendor, rom_device);
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/* If the device id is mapped, a mismatch is expected */
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if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
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(vendev == mapped_vendev)) {
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printf("ID mismatch: vendor ID %04x, device ID %04x\n",
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rom_vendor, rom_device);
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/* Continue anyway */
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}
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rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
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debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
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rom_class, rom_data->type);
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if (pplat->class != rom_class) {
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debug("Class Code mismatch ROM %06x, dev %06x\n",
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rom_class, pplat->class);
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}
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*hdrp = rom_header;
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return 0;
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}
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/**
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* pci_rom_load() - Load a ROM image and return a pointer to it
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*
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* @rom_header: Pointer to ROM image
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* @ram_headerp: Returns a pointer to the image in RAM
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* @allocedp: Returns true if @ram_headerp was allocated and needs
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* to be freed
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* @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
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* the error state. Even if this function returns an error, it may have
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* allocated memory.
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*/
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static int pci_rom_load(struct pci_rom_header *rom_header,
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struct pci_rom_header **ram_headerp, bool *allocedp)
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{
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struct pci_rom_data *rom_data;
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unsigned int rom_size;
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unsigned int image_size = 0;
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void *target;
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*allocedp = false;
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do {
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/* Get next image, until we see an x86 version */
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rom_header = (struct pci_rom_header *)((void *)rom_header +
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image_size);
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rom_data = (struct pci_rom_data *)((void *)rom_header +
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le16_to_cpu(rom_header->data));
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image_size = le16_to_cpu(rom_data->ilen) * 512;
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} while ((rom_data->type != 0) && (rom_data->indicator == 0));
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if (rom_data->type != 0)
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return -EACCES;
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rom_size = rom_header->size * 512;
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#ifdef PCI_VGA_RAM_IMAGE_START
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target = (void *)PCI_VGA_RAM_IMAGE_START;
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#else
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target = (void *)malloc(rom_size);
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if (!target)
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return -ENOMEM;
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*allocedp = true;
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#endif
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if (target != rom_header) {
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ulong start = get_timer(0);
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debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
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rom_header, target, rom_size);
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memcpy(target, rom_header, rom_size);
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if (memcmp(target, rom_header, rom_size)) {
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printf("VGA ROM copy failed\n");
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return -EFAULT;
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}
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debug("Copy took %lums\n", get_timer(start));
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}
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*ram_headerp = target;
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return 0;
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}
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struct vbe_mode_info mode_info;
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void setup_video(struct screen_info *screen_info)
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{
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struct vesa_mode_info *vesa = &mode_info.vesa;
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/* Sanity test on VESA parameters */
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if (!vesa->x_resolution || !vesa->y_resolution)
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return;
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screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
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screen_info->lfb_width = vesa->x_resolution;
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screen_info->lfb_height = vesa->y_resolution;
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screen_info->lfb_depth = vesa->bits_per_pixel;
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screen_info->lfb_linelength = vesa->bytes_per_scanline;
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screen_info->lfb_base = vesa->phys_base_ptr;
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screen_info->lfb_size =
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ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
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65536);
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screen_info->lfb_size >>= 16;
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screen_info->red_size = vesa->red_mask_size;
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screen_info->red_pos = vesa->red_mask_pos;
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screen_info->green_size = vesa->green_mask_size;
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screen_info->green_pos = vesa->green_mask_pos;
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screen_info->blue_size = vesa->blue_mask_size;
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screen_info->blue_pos = vesa->blue_mask_pos;
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screen_info->rsvd_size = vesa->reserved_mask_size;
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screen_info->rsvd_pos = vesa->reserved_mask_pos;
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}
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int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
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int exec_method)
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{
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struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
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struct pci_rom_header *rom = NULL, *ram = NULL;
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int vesa_mode = -1;
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bool emulate, alloced;
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int ret;
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/* Only execute VGA ROMs */
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if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
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debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
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PCI_CLASS_DISPLAY_VGA);
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return -ENODEV;
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}
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if (!board_should_load_oprom(dev))
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return log_msg_ret("Should not load OPROM", -ENXIO);
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ret = pci_rom_probe(dev, &rom);
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if (ret)
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return ret;
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ret = pci_rom_load(rom, &ram, &alloced);
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if (ret)
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goto err;
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if (!board_should_run_oprom(dev)) {
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ret = -ENXIO;
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goto err;
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}
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#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
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defined(CONFIG_FRAMEBUFFER_VESA_MODE)
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vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
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#endif
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debug("Selected vesa mode %#x\n", vesa_mode);
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if (exec_method & PCI_ROM_USE_NATIVE) {
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#ifdef CONFIG_X86
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emulate = false;
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#else
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if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
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printf("BIOS native execution is only available on x86\n");
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ret = -ENOSYS;
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goto err;
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}
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emulate = true;
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#endif
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} else {
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#ifdef CONFIG_BIOSEMU
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emulate = true;
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#else
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if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
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printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
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ret = -ENOSYS;
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goto err;
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}
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emulate = false;
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#endif
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}
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if (emulate) {
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#ifdef CONFIG_BIOSEMU
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BE_VGAInfo *info;
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ret = biosemu_setup(dev, &info);
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if (ret)
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goto err;
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biosemu_set_interrupt_handler(0x15, int15_handler);
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ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
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true, vesa_mode, &mode_info);
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if (ret)
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goto err;
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#endif
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} else {
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#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
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bios_set_interrupt_handler(0x15, int15_handler);
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bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
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&mode_info);
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#endif
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}
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debug("Final vesa mode %#x\n", mode_info.video_mode);
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ret = 0;
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err:
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if (alloced)
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free(ram);
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return ret;
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}
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#ifdef CONFIG_DM_VIDEO
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int vbe_setup_video_priv(struct vesa_mode_info *vesa,
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struct video_priv *uc_priv,
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struct video_uc_platdata *plat)
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{
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if (!vesa->x_resolution)
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return log_msg_ret("No x resolution", -ENXIO);
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uc_priv->xsize = vesa->x_resolution;
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uc_priv->ysize = vesa->y_resolution;
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uc_priv->line_length = vesa->bytes_per_scanline;
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switch (vesa->bits_per_pixel) {
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case 32:
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case 24:
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uc_priv->bpix = VIDEO_BPP32;
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break;
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case 16:
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uc_priv->bpix = VIDEO_BPP16;
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break;
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default:
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return -EPROTONOSUPPORT;
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}
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plat->base = vesa->phys_base_ptr;
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plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
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return 0;
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}
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int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
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{
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struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
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struct video_priv *uc_priv = dev_get_uclass_priv(dev);
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int ret;
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/* If we are running from EFI or coreboot, this can't work */
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if (!ll_boot_init()) {
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printf("Not available (previous bootloader prevents it)\n");
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return -EPERM;
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}
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bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
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ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
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PCI_ROM_ALLOW_FALLBACK);
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bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
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if (ret) {
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debug("failed to run video BIOS: %d\n", ret);
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return ret;
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}
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ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
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if (ret) {
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debug("No video mode configured\n");
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return ret;
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}
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printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
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mode_info.vesa.bits_per_pixel);
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return 0;
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}
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#endif
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