mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 06:33:45 +09:00
![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
165 lines
3.6 KiB
C
165 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015 Microchip Technology Inc
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* Purna Chandra Mandal <purna.mandal@microchip.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <linux/compat.h>
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#include <mach/pic32.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Peripheral Pin Control */
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struct pic32_reg_port {
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struct pic32_reg_atomic ansel;
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struct pic32_reg_atomic tris;
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struct pic32_reg_atomic port;
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struct pic32_reg_atomic lat;
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struct pic32_reg_atomic open_drain;
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struct pic32_reg_atomic cnpu;
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struct pic32_reg_atomic cnpd;
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struct pic32_reg_atomic cncon;
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};
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enum {
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MICROCHIP_GPIO_DIR_OUT,
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MICROCHIP_GPIO_DIR_IN,
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MICROCHIP_GPIOS_PER_BANK = 16,
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};
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struct pic32_gpio_priv {
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struct pic32_reg_port *regs;
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char name[2];
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};
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static int pic32_gpio_get_value(struct udevice *dev, unsigned offset)
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{
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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return !!(readl(&priv->regs->port.raw) & BIT(offset));
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}
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static int pic32_gpio_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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int mask = BIT(offset);
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if (value)
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writel(mask, &priv->regs->port.set);
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else
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writel(mask, &priv->regs->port.clr);
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return 0;
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}
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static int pic32_gpio_direction(struct udevice *dev, unsigned offset)
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{
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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/* pin in analog mode ? */
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if (readl(&priv->regs->ansel.raw) & BIT(offset))
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return -EPERM;
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if (readl(&priv->regs->tris.raw) & BIT(offset))
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return MICROCHIP_GPIO_DIR_IN;
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else
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return MICROCHIP_GPIO_DIR_OUT;
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}
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static int pic32_gpio_direction_input(struct udevice *dev, unsigned offset)
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{
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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int mask = BIT(offset);
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writel(mask, &priv->regs->ansel.clr);
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writel(mask, &priv->regs->tris.set);
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return 0;
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}
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static int pic32_gpio_direction_output(struct udevice *dev,
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unsigned offset, int value)
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{
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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int mask = BIT(offset);
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writel(mask, &priv->regs->ansel.clr);
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writel(mask, &priv->regs->tris.clr);
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pic32_gpio_set_value(dev, offset, value);
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return 0;
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}
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static int pic32_gpio_get_function(struct udevice *dev, unsigned offset)
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{
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int ret = GPIOF_UNUSED;
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switch (pic32_gpio_direction(dev, offset)) {
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case MICROCHIP_GPIO_DIR_OUT:
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ret = GPIOF_OUTPUT;
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break;
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case MICROCHIP_GPIO_DIR_IN:
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ret = GPIOF_INPUT;
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break;
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default:
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ret = GPIOF_UNUSED;
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break;
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}
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return ret;
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}
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static const struct dm_gpio_ops gpio_pic32_ops = {
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.direction_input = pic32_gpio_direction_input,
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.direction_output = pic32_gpio_direction_output,
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.get_value = pic32_gpio_get_value,
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.set_value = pic32_gpio_set_value,
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.get_function = pic32_gpio_get_function,
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};
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static int pic32_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct pic32_gpio_priv *priv = dev_get_priv(dev);
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fdt_addr_t addr;
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fdt_size_t size;
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char *end;
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int bank;
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addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
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&size);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->regs = ioremap(addr, size);
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uc_priv->gpio_count = MICROCHIP_GPIOS_PER_BANK;
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/* extract bank name */
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end = strrchr(dev->name, '@');
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bank = trailing_strtoln(dev->name, end);
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priv->name[0] = 'A' + bank;
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uc_priv->bank_name = priv->name;
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return 0;
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}
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static const struct udevice_id pic32_gpio_ids[] = {
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{ .compatible = "microchip,pic32mzda-gpio" },
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{ }
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};
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U_BOOT_DRIVER(gpio_pic32) = {
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.name = "gpio_pic32",
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.id = UCLASS_GPIO,
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.of_match = pic32_gpio_ids,
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.ops = &gpio_pic32_ops,
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.probe = pic32_gpio_probe,
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.priv_auto_alloc_size = sizeof(struct pic32_gpio_priv),
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};
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