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https://github.com/brain-hackers/u-boot-brain
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31a359f87e
This endinness changes are taken from linux uartlite driver. Reset TX fifo in control register and check TX fifo empty flag in lower byte of the status register to detect if it is a little endian system. Based on this check, program the registers with le32 or be32 through out the driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
172 lines
4.0 KiB
C
172 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
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* Clean driver and add xilinx constant from header file
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*
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* (C) Copyright 2004 Atmark Techno, Inc.
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* Yasushi SHOJI <yashi@atmark-techno.com>
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*/
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#include <config.h>
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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#include <serial.h>
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#define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
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#define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
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#define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
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#define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
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#define ULITE_CONTROL_RST_TX 0x01
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#define ULITE_CONTROL_RST_RX 0x02
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static bool little_endian;
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struct uartlite {
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unsigned int rx_fifo;
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unsigned int tx_fifo;
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unsigned int status;
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unsigned int control;
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};
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struct uartlite_platdata {
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struct uartlite *regs;
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};
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static u32 uart_in32(void __iomem *addr)
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{
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if (little_endian)
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return in_le32(addr);
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else
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return in_be32(addr);
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}
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static void uart_out32(void __iomem *addr, u32 val)
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{
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if (little_endian)
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out_le32(addr, val);
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else
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out_be32(addr, val);
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}
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static int uartlite_serial_putc(struct udevice *dev, const char ch)
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{
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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if (uart_in32(®s->status) & SR_TX_FIFO_FULL)
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return -EAGAIN;
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uart_out32(®s->tx_fifo, ch & 0xff);
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return 0;
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}
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static int uartlite_serial_getc(struct udevice *dev)
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{
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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if (!(uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA))
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return -EAGAIN;
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return uart_in32(®s->rx_fifo) & 0xff;
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}
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static int uartlite_serial_pending(struct udevice *dev, bool input)
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{
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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if (input)
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return uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA;
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return !(uart_in32(®s->status) & SR_TX_FIFO_EMPTY);
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}
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static int uartlite_serial_probe(struct udevice *dev)
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{
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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int ret;
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uart_out32(®s->control, 0);
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uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
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ret = uart_in32(®s->status);
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/* Endianness detection */
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if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
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little_endian = true;
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uart_out32(®s->control, ULITE_CONTROL_RST_RX |
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ULITE_CONTROL_RST_TX);
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}
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return 0;
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}
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static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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plat->regs = dev_read_addr_ptr(dev);
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return 0;
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}
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static const struct dm_serial_ops uartlite_serial_ops = {
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.putc = uartlite_serial_putc,
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.pending = uartlite_serial_pending,
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.getc = uartlite_serial_getc,
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};
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static const struct udevice_id uartlite_serial_ids[] = {
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{ .compatible = "xlnx,opb-uartlite-1.00.b", },
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{ .compatible = "xlnx,xps-uartlite-1.00.a" },
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{ }
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};
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U_BOOT_DRIVER(serial_uartlite) = {
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.name = "serial_uartlite",
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.id = UCLASS_SERIAL,
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.of_match = uartlite_serial_ids,
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.ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
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.probe = uartlite_serial_probe,
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.ops = &uartlite_serial_ops,
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};
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#ifdef CONFIG_DEBUG_UART_UARTLITE
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
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int ret;
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uart_out32(®s->control, 0);
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uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
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uart_in32(®s->status);
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/* Endianness detection */
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if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
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little_endian = true;
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uart_out32(®s->control, ULITE_CONTROL_RST_RX |
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ULITE_CONTROL_RST_TX);
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}
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
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while (uart_in32(®s->status) & SR_TX_FIFO_FULL)
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;
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uart_out32(®s->tx_fifo, ch & 0xff);
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}
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DEBUG_UART_FUNCS
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#endif
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