mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
ee14d29db0
The back-to-bootrom option is rather unfortunately named CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM instead of CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM), we need to rename it. At the same time, we introduce a TPL_ variant of the option to give us finer-grained control over when it should be used. This change is motivated by our RK3368 boot process, which returns to the boot ROM only from the TPL stage, but not from the SPL stage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:] [fixed inverted CONFIG_IS_ENABLED test for rk3288:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> include/configs/rock.h: undef
72 lines
1.8 KiB
Plaintext
72 lines
1.8 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
|
CONFIG_ROCKCHIP_RK3288=y
|
|
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
|
|
CONFIG_TARGET_EVB_RK3288=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x80000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SILENT_CONSOLE=y
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
|
|
# CONFIG_CMD_IMLS is not set
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_SF=y
|
|
CONFIG_CMD_SPI=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_GPIO=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_CMD_PMIC=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
# CONFIG_SPL_DOS_PARTITION is not set
|
|
# CONFIG_SPL_ISO_PARTITION is not set
|
|
# CONFIG_SPL_EFI_PARTITION is not set
|
|
CONFIG_SPL_PARTITION_UUIDS=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_REGMAP=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_SYSCON=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_CLK=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_LED=y
|
|
CONFIG_LED_GPIO=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
# CONFIG_SPL_PINCTRL_FULL is not set
|
|
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_PMIC_ACT8846=y
|
|
CONFIG_REGULATOR_ACT8846=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_DEBUG_UART_BASE=0xff690000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_DM_VIDEO=y
|
|
CONFIG_DISPLAY=y
|
|
CONFIG_VIDEO_ROCKCHIP=y
|
|
CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
|
|
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
|
|
CONFIG_USE_TINY_PRINTF=y
|
|
CONFIG_CMD_DHRYSTONE=y
|
|
CONFIG_ERRNO_STR=y
|