mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/**
|
|
* Copyright 2013 Freescale Semiconductor
|
|
*
|
|
* This file provides support for the ngPIXIS, a board-specific FPGA used on
|
|
* some Freescale reference boards.
|
|
*/
|
|
|
|
/*
|
|
* CPLD register set. Feel free to add board-specific #ifdefs where necessary.
|
|
*/
|
|
struct cpld_data {
|
|
u8 cpld_ver; /* 0x00 - CPLD Major Revision Register */
|
|
u8 cpld_ver_sub; /* 0x01 - CPLD Minor Revision Register */
|
|
u8 hw_ver; /* 0x02 - Hardware Revision Register */
|
|
u8 sw_ver; /* 0x03 - Software Revision register */
|
|
u8 res0[12]; /* 0x04 - 0x0F - not used */
|
|
u8 reset_ctl1; /* 0x10 - Reset control Register1 */
|
|
u8 reset_ctl2; /* 0x11 - Reset control Register2 */
|
|
u8 int_status; /* 0x12 - Interrupt status Register */
|
|
u8 flash_ctl_status; /* 0x13 - Flash control and status register */
|
|
u8 fan_ctl_status; /* 0x14 - Fan control and status register */
|
|
#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
|
|
u8 int_mask; /* 0x15 - Interrupt mask Register */
|
|
#else
|
|
u8 led_ctl_status; /* 0x15 - LED control and status register */
|
|
#endif
|
|
u8 sfp_ctl_status; /* 0x16 - SFP control and status register */
|
|
u8 misc_ctl_status; /* 0x17 - Miscellanies ctrl & status register*/
|
|
u8 boot_override; /* 0x18 - Boot override register */
|
|
u8 boot_config1; /* 0x19 - Boot config override register*/
|
|
u8 boot_config2; /* 0x1A - Boot config override register*/
|
|
} cpld_data_t;
|
|
|
|
|
|
/* Pointer to the CPLD register set */
|
|
|
|
u8 cpld_read(unsigned int reg);
|
|
void cpld_write(unsigned int reg, u8 value);
|
|
|
|
#define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
|
|
#define CPLD_WRITE(reg, value)\
|
|
cpld_write(offsetof(struct cpld_data, reg), value)
|
|
#define MISC_CTL_SG_SEL 0x80
|
|
#define MISC_CTL_AURORA_SEL 0x02
|
|
#define MISC_MUX_QE_TDM 0xc0
|