mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
1f6180dff9
TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
113 lines
1.8 KiB
Plaintext
113 lines
1.8 KiB
Plaintext
if TARGET_LS1012ARDB
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config SYS_BOARD
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default "ls1012ardb"
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config SYS_VENDOR
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default "freescale"
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config SYS_SOC
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default "fsl-layerscape"
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config SYS_CONFIG_NAME
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default "ls1012ardb"
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config SYS_LS_PPA_FW_ADDR
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hex "PPA Firmware Addr"
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default 0x40400000
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if CHAIN_OF_TRUST
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config SYS_LS_PPA_ESBC_ADDR
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hex "PPA Firmware HDR Addr"
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default 0x40680000
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endif
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if FSL_PFE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select PHYLIB
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imply PHY_REALTEK
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config SYS_LS_PFE_FW_ADDR
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hex "Flash address of PFE firmware"
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default 0x40a00000
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config SYS_LS_PFE_ESBC_ADDR
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hex "PFE Firmware HDR Addr"
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default 0x40700000
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config DDR_PFE_PHYS_BASEADDR
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hex "PFE DDR physical base address"
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default 0x03800000
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config DDR_PFE_BASEADDR
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hex "PFE DDR base address"
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default 0x83800000
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config PFE_EMAC1_PHY_ADDR
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hex "PFE DDR base address"
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default 0x2
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config PFE_EMAC2_PHY_ADDR
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hex "PFE DDR base address"
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default 0x1
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endif
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source "board/freescale/common/Kconfig"
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endif
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if TARGET_LS1012A2G5RDB
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config SYS_BOARD
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default "ls1012ardb"
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config SYS_VENDOR
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default "freescale"
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config SYS_SOC
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default "fsl-layerscape"
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config SYS_CONFIG_NAME
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default "ls1012a2g5rdb"
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config SYS_LS_PPA_FW_ADDR
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hex "PPA Firmware Addr"
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default 0x40400000
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if FSL_PFE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select PHYLIB
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imply CONFIG_PHYLIB_10G
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imply CONFIG_PHY_AQUANTIA
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config SYS_LS_PFE_FW_ADDR
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hex "Flash address of PFE firmware"
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default 0x40a00000
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config DDR_PFE_PHYS_BASEADDR
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hex "PFE DDR physical base address"
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default 0x03800000
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config DDR_PFE_BASEADDR
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hex "PFE DDR base address"
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default 0x83800000
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config PFE_EMAC1_PHY_ADDR
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hex "PFE DDR base address"
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default 0x2
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config PFE_EMAC2_PHY_ADDR
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hex "PFE DDR base address"
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default 0x1
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endif
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source "board/freescale/common/Kconfig"
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endif
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