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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad) read support as well. This means we can be given one of two boot device values, but don't care which it is, so perform a fixup on the QSPI_4 value. We add a qspiboot build target to better show how you would use QSPI as a boot device in deployment. When we boot from QSPI, we can check the environment for 'boot_os' to control Falcon Mode. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
135 lines
3.3 KiB
C
135 lines
3.3 KiB
C
/*
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* boot-common.c
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*
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* Common bootmode functions for omap based boards
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/omap_common.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sys_proto.h>
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#include <watchdog.h>
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DECLARE_GLOBAL_DATA_PTR;
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void save_omap_boot_params(void)
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{
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u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
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u8 boot_device;
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u32 dev_desc, dev_data;
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if ((rom_params < NON_SECURE_SRAM_START) ||
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(rom_params > NON_SECURE_SRAM_END))
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return;
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/*
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* rom_params can be type casted to omap_boot_parameters and
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* used. But it not correct to assume that romcode structure
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* encoding would be same as u-boot. So use the defined offsets.
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*/
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gd->arch.omap_boot_params.omap_bootdevice = boot_device =
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*((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
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gd->arch.omap_boot_params.ch_flags =
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*((u8 *)(rom_params + CH_FLAGS_OFFSET));
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if ((boot_device >= MMC_BOOT_DEVICES_START) &&
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(boot_device <= MMC_BOOT_DEVICES_END)) {
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#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
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!defined(CONFIG_AM43XX)
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if ((omap_hw_init_context() ==
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OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
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gd->arch.omap_boot_params.omap_bootmode =
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*((u8 *)(rom_params + BOOT_MODE_OFFSET));
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} else
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#endif
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{
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dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
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dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
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gd->arch.omap_boot_params.omap_bootmode =
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*((u32 *)(dev_data + BOOT_MODE_OFFSET));
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}
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}
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#ifdef CONFIG_DRA7XX
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/*
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* We get different values for QSPI_1 and QSPI_4 being used, but
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* don't actually care about this difference. Rather than
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* mangle the later code, if we're coming in as QSPI_4 just
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* change to the QSPI_1 value.
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*/
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if (gd->arch.omap_boot_params.omap_bootdevice == 11)
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gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
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#endif
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}
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#ifdef CONFIG_SPL_BUILD
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u32 spl_boot_device(void)
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{
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return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
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}
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u32 spl_boot_mode(void)
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{
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u32 val = gd->arch.omap_boot_params.omap_bootmode;
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if (val == MMCSD_MODE_RAW)
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return MMCSD_MODE_RAW;
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else if (val == MMCSD_MODE_FAT)
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return MMCSD_MODE_FAT;
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else
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#ifdef CONFIG_SUPPORT_EMMC_BOOT
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return MMCSD_MODE_EMMCBOOT;
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#else
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return MMCSD_MODE_UNDEFINED;
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#endif
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}
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void spl_board_init(void)
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{
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#ifdef CONFIG_SPL_NAND_SUPPORT
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gpmc_init();
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#endif
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#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
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arch_misc_init();
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#endif
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#if defined(CONFIG_HW_WATCHDOG)
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hw_watchdog_init();
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#endif
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#ifdef CONFIG_AM33XX
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am33xx_spl_board_init();
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#endif
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}
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int board_mmc_init(bd_t *bis)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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omap_mmc_init(0, 0, 0, -1, -1);
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break;
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case BOOT_DEVICE_MMC2:
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case BOOT_DEVICE_MMC2_2:
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omap_mmc_init(1, 0, 0, -1, -1);
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break;
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}
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return 0;
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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typedef void __noreturn (*image_entry_noargs_t)(u32 *);
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image_entry_noargs_t image_entry =
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(image_entry_noargs_t) spl_image->entry_point;
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debug("image entry point: 0x%X\n", spl_image->entry_point);
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/* Pass the saved boot_params from rom code */
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image_entry((u32 *)&gd->arch.omap_boot_params);
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}
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#endif
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