mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 08:58:52 +09:00
![Fabio Estevam](/assets/img/avatar_default.png)
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
/*
|
|
* Copyright (C) 2012 Freescale Semiconductor, Inc.
|
|
*
|
|
* Configuration settings for the Freescale i.MX6Q SabreSD board.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __MX6QSABRESD_CONFIG_H
|
|
#define __MX6QSABRESD_CONFIG_H
|
|
|
|
#include <asm/arch/imx-regs.h>
|
|
#include <asm/imx-common/gpio.h>
|
|
|
|
#define CONFIG_MACH_TYPE 3980
|
|
#define CONFIG_MXC_UART_BASE UART1_BASE
|
|
#define CONFIG_CONSOLE_DEV "ttymxc0"
|
|
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
|
|
#if defined(CONFIG_MX6Q)
|
|
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
|
|
#elif defined(CONFIG_MX6DL)
|
|
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
|
|
#endif
|
|
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
|
|
|
|
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
|
|
|
|
#include "mx6sabre_common.h"
|
|
|
|
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
|
#if defined(CONFIG_ENV_IS_IN_MMC)
|
|
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
|
|
#endif
|
|
|
|
/* Framebuffer */
|
|
#define CONFIG_VIDEO
|
|
#define CONFIG_VIDEO_IPUV3
|
|
#define CONFIG_CFB_CONSOLE
|
|
#define CONFIG_VGA_AS_SINGLE_DEVICE
|
|
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
|
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
|
|
#define CONFIG_VIDEO_BMP_RLE8
|
|
#define CONFIG_SPLASH_SCREEN
|
|
#define CONFIG_SPLASH_SCREEN_ALIGN
|
|
#define CONFIG_BMP_16BPP
|
|
#define CONFIG_VIDEO_LOGO
|
|
#define CONFIG_VIDEO_BMP_LOGO
|
|
#define CONFIG_IPUV3_CLK 260000000
|
|
#define CONFIG_IMX_HDMI
|
|
#define CONFIG_IMX_VIDEO_SKIP
|
|
|
|
#define CONFIG_CMD_PCI
|
|
#ifdef CONFIG_CMD_PCI
|
|
#define CONFIG_PCI
|
|
#define CONFIG_PCI_PNP
|
|
#define CONFIG_PCI_SCAN_SHOW
|
|
#define CONFIG_PCIE_IMX
|
|
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
|
|
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
|
|
#endif
|
|
|
|
/* I2C Configs */
|
|
#define CONFIG_CMD_I2C
|
|
#define CONFIG_SYS_I2C
|
|
#define CONFIG_SYS_I2C_MXC
|
|
#define CONFIG_SYS_I2C_SPEED 100000
|
|
|
|
/* PMIC */
|
|
#define CONFIG_POWER
|
|
#define CONFIG_POWER_I2C
|
|
#define CONFIG_POWER_PFUZE100
|
|
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
|
|
|
|
#endif /* __MX6QSABRESD_CONFIG_H */
|