u-boot-brain/arch/riscv
Bin Meng ed49ba4dcc riscv: bootm: Pass mhartid CSR value to kernel
So far this is hardcoded to zero, and we should read the value from
mhartid CSR and pass it to Linux kernel.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:48:08 +08:00
..
cpu riscv: Add a helper routine to print CPU information 2018-10-03 17:47:55 +08:00
dts riscv: dts: Support cfi flash 2018-05-29 14:45:04 +08:00
include/asm riscv: Remove CSR read/write defines in encoding.h 2018-10-03 17:48:02 +08:00
lib riscv: bootm: Pass mhartid CSR value to kernel 2018-10-03 17:48:08 +08:00
config.mk riscv: Explicitly pass -march and -mabi to the compiler 2018-10-03 17:47:43 +08:00
Kconfig riscv: kconfig: Normalize architecture name spelling 2018-10-03 17:44:38 +08:00
Makefile riscv: Add a helper routine to print CPU information 2018-10-03 17:47:55 +08:00