mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 19:56:18 +09:00
5b8a225edf
This driver allows rebooting the SoC by calling wdt_expire_now op. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
139 lines
2.6 KiB
Plaintext
139 lines
2.6 KiB
Plaintext
/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dt-bindings/clock/bcm6328-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/power-domain/bcm6328-power-domain.h>
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#include <dt-bindings/reset/bcm6328-reset.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm6328";
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cpus {
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reg = <0x10000000 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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cpu@1 {
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compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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u-boot,dm-pre-reloc;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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periph_clk: periph-clk {
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compatible = "brcm,bcm6345-clk";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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pll_cntl: syscon@10000068 {
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compatible = "syscon";
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reg = <0x10000068 0x4>;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pll_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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};
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wdt: watchdog@1000005c {
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compatible = "brcm,bcm6345-wdt";
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reg = <0x1000005c 0xc>;
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clocks = <&periph_osc>;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdt>;
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};
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gpio: gpio-controller@10000084 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000084 0x4>, <0x1000008c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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uart0: serial@10000100 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000100 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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uart1: serial@10000120 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000120 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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leds: led-controller@10000800 {
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compatible = "brcm,bcm6328-leds";
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reg = <0x10000800 0x24>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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periph_pwr: power-controller@10001848 {
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compatible = "brcm,bcm6328-power-domain";
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reg = <0x10001848 0x4>;
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#power-domain-cells = <1>;
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};
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memory-controller@10003000 {
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compatible = "brcm,bcm6328-mc";
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reg = <0x10003000 0x864>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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