mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
25ddd1fb0a
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
128 lines
3.6 KiB
C
128 lines
3.6 KiB
C
#ifndef __CONFIG_H
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#define __CONFIG_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7751 1
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#define CONFIG_CPU_SH_TYPE_R 1
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#define CONFIG_R2DPLUS 1
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#define __LITTLE_ENDIAN__ 1
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_EXT2
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#define CONFIG_DOS_PARTITION
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_CONS_SCIF1 1
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#define BOARD_LATE_INIT 1
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#define CONFIG_BOOTDELAY -1
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#define CONFIG_BOOTARGS "console=ttySC0,115200"
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#define CONFIG_ENV_OVERWRITE 1
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
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#define CONFIG_SYS_SDRAM_SIZE (0x04000000)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE 512
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/* List of legal baudrate settings for this board */
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
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/* Address of u-boot image in Flash */
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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/* Size of DRAM reserved for malloc() use */
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
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/* size in bytes reserved for initial data */
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/*
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* NOR Flash ( Spantion S29GL256P )
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_BASE (0xA0000000)
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#define CONFIG_SYS_MAX_FLASH_BANKS (1)
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_SECT_SIZE 0x40000
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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/*
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* SuperH Clock setting
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*/
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#define CONFIG_SYS_CLK_FREQ 60000000
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#define CONFIG_SYS_TMU_CLK_DIV 4
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
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/*
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* IDE support
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*/
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#define CONFIG_IDE_RESET 1
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#define CONFIG_SYS_PIO_MODE 1
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#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
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#define CONFIG_SYS_IDE_MAXDEVICE 1
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#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
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#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
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#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
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#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
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#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
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#define CONFIG_IDE_SWAP_IO
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/*
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* SuperH PCI Bridge Configration
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*/
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#define CONFIG_PCI
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#define CONFIG_SH4_PCI
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#define CONFIG_SH7751_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW 1
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#define __io
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#define __mem_pci
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#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
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#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
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#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
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#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
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#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
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#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
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#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
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/*
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* Network device (RTL8139) support
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*/
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#define CONFIG_NET_MULTI
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#define CONFIG_RTL8139
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#endif /* __CONFIG_H */
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