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https://github.com/brain-hackers/u-boot-brain
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2b714cfad4
This patch addresses a problem mentioned recently on this mailing list: [1]. In that posting a LS1021 based system was locking up at about 5 minutes after boot, but the problem was mysteriously related to the toolchain used for building u-boot. Debugging the problem reveals a stuck interrupt 29 on the GIC. It appears Freescale's LS1021 support in u-boot erroneously sets the 64-bit ARM generic PL1 physical time CompareValue register to all-ones with a 32-bit value. This causes the timer compare to fire 344 seconds after u-boot configures it. Depending on how fast u-boot gets the kernel booted, this amounts to about 5-minutes of Linux uptime before locking up. Apparently the bug is masked by some toolchains. Perhaps this is explained by default compiler options, word sizes, or binutils versions. At any rate this patch makes the manipulation explicitly 64-bit which alleviates the issue. [1] https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.html Signed-off-by: Chris Kilgour <techie@whiterocker.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
129 lines
2.5 KiB
C
129 lines
2.5 KiB
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <div64.h>
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#include <asm/arch/immap_ls102xa.h>
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#include <asm/arch/clock.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* This function is intended for SHORT delays only.
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* It will overflow at around 10 seconds @ 400MHz,
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* or 20 seconds @ 200MHz.
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*/
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unsigned long usec2ticks(unsigned long usec)
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{
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ulong ticks;
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if (usec < 1000)
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ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
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else
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ticks = ((usec / 10) * (get_tbclk() / 100000));
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return ticks;
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}
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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tick *= CONFIG_SYS_HZ;
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do_div(tick, freq);
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return tick;
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}
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static inline unsigned long long us_to_tick(unsigned long long usec)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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usec = usec * freq + 999999;
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do_div(usec, 1000000);
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return usec;
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}
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int timer_init(void)
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{
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struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
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unsigned long ctrl, freq;
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unsigned long long val;
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/* Enable System Counter */
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writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
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freq = GENERIC_TIMER_CLK;
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asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
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/* Set PL1 Physical Timer Ctrl */
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ctrl = ARCH_TIMER_CTRL_ENABLE;
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asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
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/* Set PL1 Physical Comp Value */
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val = TIMER_COMP_VAL;
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asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
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gd->arch.tbl = 0;
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gd->arch.tbu = 0;
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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unsigned long long now;
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asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
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gd->arch.tbl = (unsigned long)(now & 0xffffffff);
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gd->arch.tbu = (unsigned long)(now >> 32);
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return now;
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}
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unsigned long get_timer_masked(void)
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{
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return tick_to_time(get_ticks());
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}
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unsigned long get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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/* delay x useconds and preserve advance timstamp value */
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void __udelay(unsigned long usec)
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{
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unsigned long long start;
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unsigned long tmo;
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start = get_ticks(); /* get current timestamp */
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tmo = us_to_tick(usec); /* convert usecs to ticks */
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while ((get_ticks() - start) < tmo)
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; /* loop till time has passed */
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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unsigned long get_tbclk(void)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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return freq;
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}
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