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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
cc456bd7df
The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
17 lines
358 B
Plaintext
17 lines
358 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_EXYNOS=y
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CONFIG_TARGET_PEACH_PIT=y
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CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_SPI_FLASH=y
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CONFIG_CMD_CROS_EC=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_SPI=y
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CONFIG_CROS_EC_KEYB=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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