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ebd322de43
SPL needs to detect FPGA device which will be used for loading bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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.. | ||
ACEX1K.c | ||
altera.c | ||
cyclon2.c | ||
fpga.c | ||
ivm_core.c | ||
lattice.c | ||
Makefile | ||
socfpga.c | ||
spartan2.c | ||
spartan3.c | ||
stratixII.c | ||
virtex2.c | ||
xilinx.c | ||
zynqpl.c |