mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 19:56:18 +09:00
a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Configuration settings for the Renesas GRPEACH board
|
|
*
|
|
* Copyright (C) 2017-2019 Renesas Electronics
|
|
*/
|
|
|
|
#ifndef __GRPEACH_H
|
|
#define __GRPEACH_H
|
|
|
|
/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
|
|
#define CONFIG_SYS_CLK_FREQ 66666666
|
|
|
|
/* Serial Console */
|
|
#define CONFIG_BAUDRATE 115200
|
|
|
|
/* Miscellaneous */
|
|
#define CONFIG_SYS_PBSIZE 256
|
|
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
|
|
#define CONFIG_CMDLINE_TAG
|
|
|
|
/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
|
|
#define CONFIG_SYS_SDRAM_BASE 0x20000000
|
|
#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
|
|
#define CONFIG_SYS_INIT_SP_ADDR \
|
|
(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 1024 * 1024)
|
|
#define CONFIG_SYS_LOAD_ADDR \
|
|
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
|
|
|
|
#define CONFIG_ENV_OVERWRITE 1
|
|
|
|
/* Malloc */
|
|
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
|
|
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
|
|
|
|
/* Kernel Boot */
|
|
#define CONFIG_BOOTARGS "ignore_loglevel"
|
|
|
|
/* Network interface */
|
|
#define CONFIG_SH_ETHER_USE_PORT 0
|
|
#define CONFIG_SH_ETHER_PHY_ADDR 0
|
|
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
|
|
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
|
|
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
|
|
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
|
|
#define CONFIG_BITBANGMII
|
|
#define CONFIG_BITBANGMII_MULTI
|
|
|
|
#endif /* __GRPEACH_H */
|