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https://github.com/brain-hackers/u-boot-brain
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283591f171
This is definitions of system registers and power mananagement registers for EXYNOS SoC. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
/*
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* (C) Copyright 2012 Samsung Electronics
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARM_ARCH_SYSTEM_H_
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#define __ASM_ARM_ARCH_SYSTEM_H_
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#ifndef __ASSEMBLY__
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struct exynos4_sysreg {
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unsigned char res1[0x210];
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unsigned int display_ctrl;
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unsigned int display_ctrl2;
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unsigned int camera_control;
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unsigned int audio_endian;
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unsigned int jtag_con;
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};
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struct exynos5_sysreg {
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unsigned char res1[0x214];
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unsigned int disp1blk_cfg;
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unsigned int disp2blk_cfg;
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unsigned int hdcp_e_fuse;
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unsigned int gsclblk_cfg0;
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unsigned int gsclblk_cfg1;
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unsigned int reserved;
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unsigned int ispblk_cfg;
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unsigned int usb20phy_cfg;
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unsigned int mipi_dphy;
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unsigned int dptx_dphy;
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unsigned int phyclk_sel;
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};
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#endif
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void set_system_display_ctrl(void);
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#endif /* _EXYNOS4_SYSTEM_H */
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