mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 02:49:44 +09:00
a425bf7281
The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste space on other boards using SPL. Add a KConfig entry to allow boards to selectively include the DDR calibration routines. Signed-off-by: Eric Nelson <eric@nelint.com>
47 lines
1.0 KiB
Plaintext
47 lines
1.0 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_MX6=y
|
|
CONFIG_SPL_GPIO_SUPPORT=y
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_MX6_DDRCAL=y
|
|
CONFIG_TARGET_KOSAGI_NOVENA=y
|
|
CONFIG_SPL_EXT_SUPPORT=y
|
|
CONFIG_SPL_FAT_SUPPORT=y
|
|
CONFIG_SPL_I2C_SUPPORT=y
|
|
CONFIG_SPL_LIBDISK_SUPPORT=y
|
|
CONFIG_SPL_MMC_SUPPORT=y
|
|
CONFIG_SPL_SERIAL_SUPPORT=y
|
|
CONFIG_SPL_WATCHDOG_SUPPORT=y
|
|
CONFIG_VIDEO=y
|
|
CONFIG_FIT=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
|
|
CONFIG_VERSION_VARIABLE=y
|
|
CONFIG_SPL=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
# CONFIG_CMD_IMLS is not set
|
|
CONFIG_CMD_ASKENV=y
|
|
# CONFIG_CMD_FLASH is not set
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_USB=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_EXT4=y
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_CMD_FS_GENERIC=y
|
|
CONFIG_PCI=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_STORAGE=y
|
|
CONFIG_USB_KEYBOARD=y
|
|
CONFIG_USB_GADGET=y
|
|
CONFIG_CI_UDC=y
|
|
# CONFIG_VIDEO_SW_CURSOR is not set
|
|
CONFIG_OF_LIBFDT=y
|