mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/addrspace.h>
|
|
#include <asm/types.h>
|
|
#include <mach/ar71xx_regs.h>
|
|
#include <mach/ddr.h>
|
|
#include <mach/ath79.h>
|
|
#include <debug_uart.h>
|
|
|
|
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
|
|
void board_debug_uart_init(void)
|
|
{
|
|
void __iomem *regs;
|
|
u32 val;
|
|
|
|
regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
|
|
MAP_NOCACHE);
|
|
|
|
/*
|
|
* GPIO9 as input, GPIO10 as output
|
|
*/
|
|
val = readl(regs + AR71XX_GPIO_REG_OE);
|
|
val |= QCA953X_GPIO(9);
|
|
val &= ~QCA953X_GPIO(10);
|
|
writel(val, regs + AR71XX_GPIO_REG_OE);
|
|
|
|
/*
|
|
* Enable GPIO10 as UART0_SOUT
|
|
*/
|
|
val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
|
|
val &= ~QCA953X_GPIO_MUX_MASK(16);
|
|
val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
|
|
writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
|
|
|
|
/*
|
|
* Enable GPIO9 as UART0_SIN
|
|
*/
|
|
val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
|
|
val &= ~QCA953X_GPIO_MUX_MASK(8);
|
|
val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
|
|
writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
|
|
|
|
/*
|
|
* Enable GPIO10 output
|
|
*/
|
|
val = readl(regs + AR71XX_GPIO_REG_OUT);
|
|
val |= QCA953X_GPIO(10);
|
|
writel(val, regs + AR71XX_GPIO_REG_OUT);
|
|
}
|
|
#endif
|
|
|
|
int board_early_init_f(void)
|
|
{
|
|
ddr_init();
|
|
ath79_eth_reset();
|
|
return 0;
|
|
}
|