Marek Vasut ea9aa2414e ddr: altera: Make DLEVEL behavior inclusive ... Originally, the DLEVEL selects the debug level within the sequencer code, but only displays the messages on that particular debug level. Tweak the handling such that for particular debug level, debug messages on that level and lower are displayed. This allows better regulation of debug message verbosity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>		2016-04-20 11:28:45 +02:00
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altera	ddr: altera: Make DLEVEL behavior inclusive	2016-04-20 11:28:45 +02:00
fsl	Fix typo choosen in comments and printf logs	2016-03-27 09:12:23 -04:00
marvell	arm: mvebu: Fix ddr3_init() cpu config	2016-03-24 09:36:40 +01:00
microchip	drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.	2016-02-01 22:14:01 +01:00