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https://github.com/brain-hackers/u-boot-brain
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a47a12becf
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
73 lines
2.3 KiB
ArmAsm
73 lines
2.3 KiB
ArmAsm
/*
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* Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
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* Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
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* Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
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* Copyright Freescale Semiconductor, Inc. 2004, 2006.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <ppc_asm.tmpl>
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/*------------------------------------------------------------------------------- */
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/* Function: ppcDcbf */
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/* Description: Data Cache block flush */
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/* Input: r3 = effective address */
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/* Output: none. */
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/*------------------------------------------------------------------------------- */
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.globl ppcDcbf
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ppcDcbf:
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dcbf r0,r3
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blr
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/*------------------------------------------------------------------------------- */
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/* Function: ppcDcbi */
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/* Description: Data Cache block Invalidate */
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/* Input: r3 = effective address */
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/* Output: none. */
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/*------------------------------------------------------------------------------- */
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.globl ppcDcbi
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ppcDcbi:
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dcbi r0,r3
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blr
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/*--------------------------------------------------------------------------
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* Function: ppcDcbz
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* Description: Data Cache block zero.
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* Input: r3 = effective address
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* Output: none.
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*-------------------------------------------------------------------------- */
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.globl ppcDcbz
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ppcDcbz:
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dcbz r0,r3
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blr
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/*------------------------------------------------------------------------------- */
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/* Function: ppcSync */
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/* Description: Processor Synchronize */
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/* Input: none. */
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/* Output: none. */
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/*------------------------------------------------------------------------------- */
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.globl ppcSync
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ppcSync:
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sync
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blr
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