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https://github.com/brain-hackers/u-boot-brain
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644a3cd77e
This adds U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT). The CLINT block holds memory-mapped control and status registers associated with software and timer interrupts. This driver implements the riscv_get_time() API as required by the generic RISC-V timer driver, as well as some other APIs that are needed for handling IPI. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
20 lines
373 B
C
20 lines
373 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef _ASM_SYSCON_H
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#define _ASM_SYSCON_H
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/*
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* System controllers in a RISC-V system
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*
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* So far only SiFive's Core Local Interruptor (CLINT) is defined.
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*/
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enum {
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RISCV_NONE,
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RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */
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};
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#endif /* _ASM_SYSCON_H */
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