Simon Glass ea4e97a511 x86: Set the DRAM banks to reflect real location ... At present with fsp a single DRAM bank is added which extends to the whole size of memory. However there is typically only 2GB of memory available below the 4GB boundary, and this is what is used by U-Boot while running in 32-bit mode. Scan the tables to set the banks correct. The first bank is set to memory below 4GB, and the rest of memory is put into subsequent banks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2019-12-15 11:44:15 +08:00
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cpu	x86: Update mrccache to support multiple caches	2019-12-15 11:44:14 +08:00
dts	binman: x86: Separate out 16-bit reset and init code	2019-10-15 08:40:02 -06:00
include/asm	x86: Move fsp_prepare_mrc_cache() to fsp1 directory	2019-12-15 11:44:15 +08:00
lib	x86: Set the DRAM banks to reflect real location	2019-12-15 11:44:15 +08:00
config.mk	x86: efi: app: Generate Microsoft PE format compliant image	2018-12-02 21:59:36 +01:00
Kconfig	x86: Drop RESET_SEG_SIZE	2019-10-11 17:37:34 +08:00
Makefile	x86: Allow 16-bit init to be in TPL	2019-05-08 13:02:13 +08:00