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https://github.com/brain-hackers/u-boot-brain
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![Lars Povlsen](/assets/img/avatar_default.png)
As we are moving to multi-dtb and board detection, remove static board config options, and introduce board probing instead. Luton: This add single-binary support for the two MSCC luton-based reference boards - pcb090 and pcb091. The SoC chip ID is used to determine the board type. Ocelot: This add single-binary support for the two MSCC ocelot-based reference boards - pcb120 and pcb123. The PHY ids on specific ports are used to determine the board type. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
99 lines
2.1 KiB
C
99 lines
2.1 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/addrspace.h>
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#include <asm/types.h>
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#include <environment.h>
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#include <spi.h>
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DECLARE_GLOBAL_DATA_PTR;
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enum {
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BOARD_TYPE_PCB120 = 0xAABBCC00,
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BOARD_TYPE_PCB123,
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};
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void external_cs_manage(struct udevice *dev, bool enable)
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{
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u32 cs = spi_chip_select(dev);
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/* IF_SI0_OWNER, select the owner of the SI interface
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* Encoding: 0: SI Slave
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* 1: SI Boot Master
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* 2: SI Master Controller
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*/
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if (!enable) {
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writel(ICPU_SW_MODE_SW_PIN_CTRL_MODE |
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ICPU_SW_MODE_SW_SPI_CS(BIT(cs)), BASE_CFG + ICPU_SW_MODE);
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clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
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ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
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ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
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} else {
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writel(0, BASE_CFG + ICPU_SW_MODE);
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clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
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ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
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ICPU_GENERAL_CTRL_IF_SI_OWNER(1));
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}
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}
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void board_debug_uart_init(void)
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{
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/* too early for the pinctrl driver, so configure the UART pins here */
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mscc_gpio_set_alternate(6, 1);
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mscc_gpio_set_alternate(7, 1);
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}
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int board_early_init_r(void)
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{
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/* Prepare SPI controller to be used in master mode */
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writel(0, BASE_CFG + ICPU_SW_MODE);
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clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
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ICPU_GENERAL_CTRL_IF_SI_OWNER_M,
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ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
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/* Address of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
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return 0;
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}
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static void do_board_detect(void)
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{
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u16 dummy = 0;
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/* Enable MIIM */
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mscc_gpio_set_alternate(14, 1);
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mscc_gpio_set_alternate(15, 1);
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if (mscc_phy_rd(1, 0, 0, &dummy) == 0)
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gd->board_type = BOARD_TYPE_PCB120;
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else
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gd->board_type = BOARD_TYPE_PCB123;
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}
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#if defined(CONFIG_MULTI_DTB_FIT)
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int board_fit_config_name_match(const char *name)
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{
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if (gd->board_type == BOARD_TYPE_PCB120 &&
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strcmp(name, "ocelot_pcb120") == 0)
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return 0;
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if (gd->board_type == BOARD_TYPE_PCB123 &&
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strcmp(name, "ocelot_pcb123") == 0)
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return 0;
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return -1;
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}
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#endif
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#if defined(CONFIG_DTB_RESELECT)
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int embedded_dtb_select(void)
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{
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do_board_detect();
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fdtdec_setup();
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return 0;
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}
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#endif
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