mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-19 11:13:24 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#ifndef _DDR3_HWS_HW_TRAINING_H
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#define _DDR3_HWS_HW_TRAINING_H
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/* struct used for DLB configuration array */
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struct dlb_config {
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u32 reg_addr;
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u32 reg_data;
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};
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/* Topology update structure */
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struct topology_update_info {
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int update_ecc;
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u8 ecc;
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int update_width;
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u8 width;
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int update_ecc_pup3_mode;
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u8 ecc_pup_mode_offset;
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};
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/* Topology update defines */
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#define TOPOLOGY_UPDATE_WIDTH_16BIT 1
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#define TOPOLOGY_UPDATE_WIDTH_32BIT 0
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#define TOPOLOGY_UPDATE_WIDTH_32BIT_MASK 0xf
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#define TOPOLOGY_UPDATE_WIDTH_16BIT_MASK 0x3
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#define TOPOLOGY_UPDATE_ECC_ON 1
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#define TOPOLOGY_UPDATE_ECC_OFF 0
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#define TOPOLOGY_UPDATE_ECC_OFFSET_PUP4 4
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#define TOPOLOGY_UPDATE_ECC_OFFSET_PUP3 3
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/*
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* 1. L2 filter should be set at binary header to 0xd000000,
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* to avoid conflict with internal register IO.
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* 2. U-Boot modifies internal registers base to 0xf100000,
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* and than should update L2 filter accordingly to 0xf000000 (3.75 GB)
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*/
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/* temporary limit l2 filter to 3GiB (LSP issue) */
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#define L2_FILTER_FOR_MAX_MEMORY_SIZE 0xc0000000
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#define ADDRESS_FILTERING_END_REGISTER 0x8c04
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#define SUB_VERSION 0
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#endif /* _DDR3_HWS_HW_TRAINING_H */
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