mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
126 lines
3.0 KiB
C
126 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2013-2015 Arcturus Networks, Inc.
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* http://www.arcturusnetworks.com/products/ucp1020/
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* based on board/freescale/p1_p2_rdb_pc/spl.c
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* original copyright follows:
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* Copyright 2013 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <console.h>
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#include <environment.h>
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#include <ns16550.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <nand.h>
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#include <i2c.h>
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#include <fsl_esdhc.h>
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#include <spi_flash.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const u32 sysclk_tbl[] = {
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66666000, 7499900, 83332500, 8999900,
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99999000, 11111000, 12499800, 13333200
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};
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phys_size_t get_effective_memsize(void)
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{
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return CONFIG_SYS_L2_SIZE;
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}
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void board_init_f(ulong bootflag)
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{
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u32 plat_ratio, bus_clk;
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
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console_init_f();
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/* Set pmuxcr to allow both i2c1 and i2c2 */
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setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
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setbits_be32(&gur->pmuxcr,
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in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
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/* Read back the register to synchronize the write. */
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in_be32(&gur->pmuxcr);
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#ifdef CONFIG_SPL_SPI_BOOT
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clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
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#endif
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/* initialize selected port with appropriate baud rate */
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
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plat_ratio >>= 1;
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bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
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gd->bus_clk = bus_clk;
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
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bus_clk / 16 / CONFIG_BAUDRATE);
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#ifdef CONFIG_SPL_MMC_BOOT
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puts("\nSD boot...\n");
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#elif defined(CONFIG_SPL_SPI_BOOT)
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puts("\nSPI Flash boot...\n");
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#endif
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/* copy code to RAM and jump to it - this should not return */
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read.
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*/
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relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
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}
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void board_init_r(gd_t *gd, ulong dest_addr)
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{
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/* Pointer is writable since we allocated a register for it */
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gd = (gd_t *)CONFIG_SPL_GD_ADDR;
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bd_t *bd;
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memset(gd, 0, sizeof(gd_t));
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bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
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memset(bd, 0, sizeof(bd_t));
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gd->bd = bd;
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bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
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bd->bi_memsize = CONFIG_SYS_L2_SIZE;
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arch_cpu_init();
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get_clocks();
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mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
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CONFIG_SPL_RELOC_MALLOC_SIZE);
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#ifndef CONFIG_SPL_NAND_BOOT
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env_init();
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#endif
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#ifdef CONFIG_SPL_MMC_BOOT
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mmc_initialize(bd);
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#endif
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/* relocate environment function pointers etc. */
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#ifdef CONFIG_SPL_NAND_BOOT
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nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_ENV_ADDR);
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gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
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gd->env_valid = ENV_VALID;
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#else
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env_relocate();
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#endif
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#ifdef CONFIG_SYS_I2C
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i2c_init_all();
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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dram_init();
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#ifdef CONFIG_SPL_NAND_BOOT
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puts("Tertiary program loader running in sram...");
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#else
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puts("Second program loader running in sram...\n");
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#endif
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#ifdef CONFIG_SPL_MMC_BOOT
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mmc_boot();
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#elif defined(CONFIG_SPL_NAND_BOOT)
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nand_boot();
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#endif
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}
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