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e99d719359
u-boot-brain/arch/arm/include/asm/arch-mx7
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Alex Porosanu e99d719359 arch/arm: add SEC JR0 offset 
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)

Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18 08:51:46 -07:00
..
clock_slice.h imx: imx7d: clock control module support 2015-09-13 10:11:53 +02:00
clock.h imx: imx7d: clock control module support 2015-09-13 10:11:53 +02:00
crm_regs.h imx: imx7d: initial arch level support 2015-09-13 10:11:53 +02:00
gpio.h imx: mxc_gpio: add support for imx7d SoC 2015-09-02 15:31:33 +02:00
imx-rdc.h imx: mx7d: Add RDC support 2016-02-21 11:46:26 +01:00
imx-regs.h arch/arm: add SEC JR0 offset 2016-05-18 08:51:46 -07:00
mx7-pins.h imx: iomux-v3: add imx7d support for iomuxc 2015-09-02 15:31:33 +02:00
mx7d_pins.h imx: iomux-v3: add imx7d support for iomuxc 2015-09-02 15:31:33 +02:00
mx7d_rdc.h imx: mx7d: Add RDC support 2016-02-21 11:46:26 +01:00
sys_proto.h imx: mx7dsabresd: Add support for MX7D SABRESD board 2015-09-13 10:11:54 +02:00