mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
5589bc2770
This allows U-Boot to expose UMS and DFU protocols on this port in device mode, or to act as a USB host on the port, using an "OTG" (micro-B to female A host) cable. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
82 lines
1.3 KiB
Plaintext
82 lines
1.3 KiB
Plaintext
/dts-v1/;
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#include "tegra114.dtsi"
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/ {
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model = "NVIDIA Dalmore";
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compatible = "nvidia,dalmore", "nvidia,tegra114";
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chosen {
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stdout-path = &uartd;
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};
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aliases {
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i2c0 = "/i2c@7000d000";
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i2c1 = "/i2c@7000c000";
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i2c2 = "/i2c@7000c400";
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i2c3 = "/i2c@7000c500";
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i2c4 = "/i2c@7000c700";
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sdhci0 = "/sdhci@78000600";
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sdhci1 = "/sdhci@78000400";
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usb0 = "/usb@7d000000";
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usb1 = "/usb@7d008000";
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c700 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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};
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spi@7000da00 {
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status = "okay";
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spi-max-frequency = <25000000>;
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};
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sdhci@78000400 {
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cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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status = "okay";
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};
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sdhci@78000600 {
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bus-width = <8>;
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status = "okay";
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};
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usb@7d000000 {
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status = "okay";
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dr_mode = "otg";
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
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};
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usb@7d008000 {
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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