mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 03:36:16 +09:00
e945816efb
Add initial clock driver for Allwinner H3/H5. - Implement USB bus and USB clocks via ccu_clk_gate table for H3/H5, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for H3/H5, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
11 lines
209 B
Makefile
11 lines
209 B
Makefile
#
|
|
# Copyright (C) 2018 Amarula Solutions.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
|
|
|
|
obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
|
|
obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o
|