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https://github.com/brain-hackers/u-boot-brain
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e180c2b129
The test flags used by driver model are currently not available to other tests. Rather than creating two sets of flags, make these flags generic by changing the DM_ prefix to UT_ and moving them to the test.h header. This will allow adding other test flags without confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
80 lines
1.9 KiB
C
80 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2018
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
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*/
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#include <common.h>
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#include <axi.h>
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#include <dm.h>
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#include <log.h>
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#include <asm/axi.h>
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#include <dm/test.h>
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#include <test/test.h>
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#include <test/ut.h>
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/* Test that sandbox AXI works correctly */
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static int dm_test_axi_base(struct unit_test_state *uts)
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{
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struct udevice *bus;
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ut_assertok(uclass_get_device(UCLASS_AXI, 0, &bus));
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return 0;
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}
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DM_TEST(dm_test_axi_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that sandbox PCI bus numbering works correctly */
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static int dm_test_axi_busnum(struct unit_test_state *uts)
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{
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struct udevice *bus;
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ut_assertok(uclass_get_device_by_seq(UCLASS_AXI, 0, &bus));
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return 0;
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}
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DM_TEST(dm_test_axi_busnum, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that we can use the store device correctly */
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static int dm_test_axi_store(struct unit_test_state *uts)
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{
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struct udevice *store;
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u8 tdata1[] = {0x55, 0x66, 0x77, 0x88};
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u8 tdata2[] = {0xaa, 0xbb, 0xcc, 0xdd};
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u32 val;
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u8 *data;
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/* Check that asking for the device automatically fires up AXI */
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ut_assertok(uclass_get_device(UCLASS_AXI_EMUL, 0, &store));
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ut_assert(device_active(store));
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axi_get_store(store, &data);
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/* Test reading */
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memcpy(data, tdata1, ARRAY_SIZE(tdata1));
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axi_read(store, 0, &val, AXI_SIZE_32);
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ut_asserteq(0x55667788, val);
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memcpy(data + 3, tdata2, ARRAY_SIZE(tdata2));
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axi_read(store, 3, &val, AXI_SIZE_32);
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ut_asserteq(0xaabbccdd, val);
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/* Reset data store */
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memset(data, 0, 16);
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/* Test writing */
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val = 0x55667788;
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axi_write(store, 0, &val, AXI_SIZE_32);
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ut_asserteq_mem(data, tdata1, ARRAY_SIZE(tdata1));
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val = 0xaabbccdd;
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axi_write(store, 3, &val, AXI_SIZE_32);
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ut_asserteq_mem(data + 3, tdata2, ARRAY_SIZE(tdata1));
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return 0;
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}
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DM_TEST(dm_test_axi_store, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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