mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009 Faraday Technology
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* Po-Yu Chuang <ratbert@faraday-tech.com>
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*/
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/*
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* Static Memory Controller
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*/
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#ifndef __FTSMC020_H
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#define __FTSMC020_H
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#ifndef __ASSEMBLY__
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struct ftsmc020_bank {
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unsigned int cr;
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unsigned int tpr;
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};
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struct ftsmc020 {
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struct ftsmc020_bank bank[4]; /* 0x00 - 0x1c */
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unsigned int pad[8]; /* 0x20 - 0x3c */
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unsigned int ssr; /* 0x40 */
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};
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void ftsmc020_init(void);
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#endif /* __ASSEMBLY__ */
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/*
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* Memory Bank Configuration Register
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*/
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#define FTSMC020_BANK_ENABLE (1 << 28)
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#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000)
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#define FTSMC020_BANK_WPROT (1 << 11)
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#define FTSMC020_BANK_TYPE1 (1 << 10)
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#define FTSMC020_BANK_TYPE2 (1 << 9)
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#define FTSMC020_BANK_TYPE3 (1 << 8)
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#define FTSMC020_BANK_SIZE_32K (0xb << 4)
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#define FTSMC020_BANK_SIZE_64K (0xc << 4)
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#define FTSMC020_BANK_SIZE_128K (0xd << 4)
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#define FTSMC020_BANK_SIZE_256K (0xe << 4)
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#define FTSMC020_BANK_SIZE_512K (0xf << 4)
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#define FTSMC020_BANK_SIZE_1M (0x0 << 4)
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#define FTSMC020_BANK_SIZE_2M (0x1 << 4)
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#define FTSMC020_BANK_SIZE_4M (0x2 << 4)
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#define FTSMC020_BANK_SIZE_8M (0x3 << 4)
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#define FTSMC020_BANK_SIZE_16M (0x4 << 4)
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#define FTSMC020_BANK_SIZE_32M (0x5 << 4)
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#define FTSMC020_BANK_SIZE_64M (0x6 << 4)
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#define FTSMC020_BANK_MBW_8 (0x0 << 0)
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#define FTSMC020_BANK_MBW_16 (0x1 << 0)
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#define FTSMC020_BANK_MBW_32 (0x2 << 0)
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/*
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* Memory Bank Timing Parameter Register
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*/
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#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28)
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#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24)
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#define FTSMC020_TPR_RBE (1 << 20)
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#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18)
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#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16)
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#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12)
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#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8)
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#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6)
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#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4)
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#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0)
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#endif /* __FTSMC020_H */
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