mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
5d57dfad3f
As the ownership is now Hitachi Power Grids, change the license string and adapt the compatible string in DTS files. For kmeter1.dts we change it to "keymile,KMETER1" for now, as this is then compliant with what is submitted to the linux kernel. All other boards don't have a upstreamed version in linux mainline. Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> CC: Heiko Schocher <hs@denx.de> CC: Marek Vasut <marex@denx.de> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
127 lines
3.8 KiB
C
127 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017-2020 Hitachi Power Grids
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*
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*/
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#ifndef __CONFIG_SOCFPGA_SECU1_H__
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#define __CONFIG_SOCFPGA_SECU1_H__
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#include <asm/arch/base_addr_ac5.h>
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#include <linux/stringify.h>
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/* Call misc_init_r */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_HUSH_INIT_VAR
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/* Eternal oscillator */
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#define CONFIG_SYS_TIMER_RATE 40000000
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512MiB on SECU1 */
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/*
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* We use bootcounter in i2c nvram of the RTC (0x68)
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* The offset fopr the bootcounter is 0x9e, which are
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* the last two bytes of the 128 bytes large NVRAM in the
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* RTC which begin at address 0x20
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*/
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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/* Booting Linux */
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#define CONFIG_BOOTFILE "zImage"
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#define CONFIG_BOOTCOMMAND \
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"setenv bootcmd '" \
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"bridge enable; " \
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"if test ${bootnum} = \"b\"; " \
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"then run _fpga_loadsafe; " \
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"else if test ${bootcount} -eq 4; then echo \"Switching copy...\"; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; " \
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"run _fpga_loaduser; " \
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"fi;" \
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"echo \"Booting bank $bootnum\" && run userload && run userboot;" \
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"' && " \
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"setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && " \
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"saveenv && saveenv && boot;"
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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/* Environment settings */
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/*
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* Autoboot
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*
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* After 45s of inactivity in the prompt, the board will reset.
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* Set 'bootretry' in the environment to -1 to disable this behavior
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*/
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#define CONFIG_BOOT_RETRY_TIME 45
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#define CONFIG_RESET_TO_RETRY
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_KM_KERNEL_ADDR
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/*
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* FPGA Remote Update related environment
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*
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* Note that since those commands access the FPGA, the HPS-to-FPGA
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* bridges MUST have been previously enabled (for example
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* with 'bridge enable').
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*/
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#define FPGA_RMTU_ENV \
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"rmtu_page=0xFF29000C\0" \
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"rmtu_reconfig=0xFF290018\0" \
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"fpga_safebase=0x0\0" \
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"fpga_userbase=0x2000000\0" \
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"_fpga_loaduser=echo Loading FPGA USER image..." \
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" && mw ${rmtu_page} ${fpga_userbase} && mw ${rmtu_reconfig} 1\0" \
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"_fpga_loadsafe=echo Loading FPGA SAFE image..." \
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" && mw ${rmtu_page} ${fpga_safebase} && mw ${rmtu_reconfig} 1\0" \
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#define CONFIG_KM_NEW_ENV \
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"newenv=" \
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"nand erase 0x100000 0x40000\0"
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#define CONFIG_KM_DEF_ENV_BOOTTARGETS \
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"release=" \
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"run newenv; reset\0" \
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"develop=" \
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"tftp 0x200000 scripts/develop-secu.txt && env import -t 0x200000 ${filesize} && saveenv && reset\0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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FPGA_RMTU_ENV \
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CONFIG_KM_DEF_ENV_BOOTTARGETS \
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CONFIG_KM_NEW_ENV \
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"socfpga_legacy_reset_compat=1\0" \
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"altbootcmd=run bootcmd;\0" \
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"bootlimit=6\0" \
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"bootnum=1\0" \
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"bootretry=" __stringify(CONFIG_BOOT_RETRY_TIME) "\0" \
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"fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \
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"load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \
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"loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \
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"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \
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"userload=ubi part nand.ubi &&" \
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"ubi check rootfs$bootnum &&" \
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"ubi read $fdt_addr dtb$bootnum &&" \
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"ubi read $loadaddr kernel$bootnum\0" \
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"userboot=setenv bootargs " CONFIG_BOOTARGS \
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" ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid" \
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" ro rootfstype=squashfs init=sbin/preinit;" \
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"bootz ${loadaddr} - ${fdt_addr}\0" \
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"verify=y\0"
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#ifdef CONFIG_SPL_NAND_SUPPORT
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#undef CONFIG_SYS_NAND_U_BOOT_OFFS
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#endif
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#undef CONFIG_WATCHDOG_TIMEOUT_MSECS
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
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#endif /* __CONFIG_SOCFPGA_SECU1_H__ */
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